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Searched refs:sdhci_readw (Results 1 - 25 of 50) sorted by relevance

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/kernel/linux/linux-5.10/drivers/mmc/host/
H A Dsdhci-milbeaut.c92 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
105 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
189 ctl = sdhci_readw(host, F_SDH30_AHB_CONFIG); in sdhci_milbeaut_vendor_init()
218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
H A Dsdhci.c61 sdhci_readw(host, SDHCI_HOST_VERSION)); in sdhci_dumpregs()
63 sdhci_readw(host, SDHCI_BLOCK_SIZE), in sdhci_dumpregs()
64 sdhci_readw(host, SDHCI_BLOCK_COUNT)); in sdhci_dumpregs()
67 sdhci_readw(host, SDHCI_TRANSFER_MODE)); in sdhci_dumpregs()
76 sdhci_readw(host, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs()
84 sdhci_readw(host, SDHCI_AUTO_CMD_STATUS), in sdhci_dumpregs()
85 sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); in sdhci_dumpregs()
90 sdhci_readw(host, SDHCI_COMMAND), in sdhci_dumpregs()
99 sdhci_readw(host, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
131 ctrl2 = sdhci_readw(hos in sdhci_do_enable_v4_mode()
[all...]
H A Dsdhci-sprd.c163 u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
173 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
319 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
536 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
668 host->version = sdhci_readw(host, SDHCI_HOST_VERSION); in sdhci_sprd_probe()
H A Dsdhci-pci-o2micro.c122 scratch = sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
149 if (!(sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1) & O2_PLL_LOCK_STATUS)) in sdhci_o2_get_cd()
195 reg = sdhci_readw(host, O2_SD_VENDOR_SETTING); in sdhci_o2_set_tuning_mode()
207 u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_o2_execute_tuning()
324 scratch = sdhci_readw(host, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
366 scratch = sdhci_readw(host, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
H A Dsdhci_f_sdh30.c74 if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) in sdhci_f_sdh30_reset()
153 ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG); in sdhci_f_sdh30_probe()
H A Dsdhci-pci-dwc-mshc.c36 vendor_ptr = sdhci_readw(host, SDHCI_VENDOR_PTR_R); in sdhci_snps_set_clock()
H A Dsdhci-cns3xxx.c62 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cns3xxx_set_clock()
H A Dsdhci-xenon.c37 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
200 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
286 reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_ios()
H A Dsdhci-pci-arasan.c101 val = sdhci_readw(host, PHY_ADDR_REG); in arasan_phy_addr_poll()
125 *data = sdhci_readw(host, PHY_DAT_REG) & DATA_MASK; in arasan_phy_read()
H A Dsdhci-pci-gli.c214 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
234 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
280 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_execute_tuning_9750()
640 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
H A Dsdhci-of-at91.c76 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
89 if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE), in sdhci_at91_set_clock()
H A Dsdhci-of-dwcmshc.c82 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
H A Dsdhci-sirf.c84 clock_setting = sdhci_readw(host, SDHCI_CLK_DELAY_SETTING); in sdhci_sirf_execute_tuning()
/kernel/linux/linux-6.6/drivers/mmc/host/
H A Dsdhci-milbeaut.c92 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
105 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
189 ctl = sdhci_readw(host, F_SDH30_AHB_CONFIG); in sdhci_milbeaut_vendor_init()
218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
H A Dsdhci.c60 sdhci_readw(host, SDHCI_HOST_VERSION)); in sdhci_dumpregs()
62 sdhci_readw(host, SDHCI_BLOCK_SIZE), in sdhci_dumpregs()
63 sdhci_readw(host, SDHCI_BLOCK_COUNT)); in sdhci_dumpregs()
66 sdhci_readw(host, SDHCI_TRANSFER_MODE)); in sdhci_dumpregs()
75 sdhci_readw(host, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs()
83 sdhci_readw(host, SDHCI_AUTO_CMD_STATUS), in sdhci_dumpregs()
84 sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); in sdhci_dumpregs()
89 sdhci_readw(host, SDHCI_COMMAND), in sdhci_dumpregs()
98 sdhci_readw(host, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
130 ctrl2 = sdhci_readw(hos in sdhci_do_enable_v4_mode()
[all...]
H A Dsdhci-pci-o2micro.c132 scratch = sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
159 if (!(sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1) & O2_PLL_LOCK_STATUS)) in sdhci_o2_get_cd()
205 reg = sdhci_readw(host, O2_SD_VENDOR_SETTING); in sdhci_o2_set_tuning_mode()
217 u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_o2_execute_tuning()
338 scratch = sdhci_readw(host, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
350 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
374 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
420 scratch = sdhci_readw(host, O2_SD_MISC_CTRL); in sdhci_o2_execute_tuning()
670 scratch16 = sdhci_readw(host, O2_SD_PCIE_SWITCH); in sdhci_pci_o2_init_sd_express()
H A Dsdhci_f_sdh30.c77 if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) in sdhci_f_sdh30_reset()
173 ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG); in sdhci_f_sdh30_probe()
H A Dsdhci-of-dwcmshc.c167 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
185 ctrl = sdhci_readw(host, priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL); in dwcmshc_set_uhs_signaling()
680 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_enable_card_clk()
691 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_disable_card_clk()
H A Dsdhci-sprd.c178 u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
188 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
343 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
560 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
829 host->version = sdhci_readw(host, SDHCI_HOST_VERSION); in sdhci_sprd_probe()
H A Dsdhci-pci-dwc-mshc.c36 vendor_ptr = sdhci_readw(host, SDHCI_VENDOR_PTR_R); in sdhci_snps_set_clock()
H A Dsdhci-pci-arasan.c101 val = sdhci_readw(host, PHY_ADDR_REG); in arasan_phy_addr_poll()
125 *data = sdhci_readw(host, PHY_DAT_REG) & DATA_MASK; in arasan_phy_read()
H A Dsdhci-pci-gli.c331 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
351 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
397 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_execute_tuning_9750()
1035 value = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1069 value = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1223 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
1381 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
1397 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
1404 if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE), in gl9763e_runtime_resume()
H A Dsdhci-xenon.c38 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
201 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
297 reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_ios()
H A Dsdhci-of-at91.c76 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
89 if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE), in sdhci_at91_set_clock()
H A Dsdhci-acpi.c485 preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR104); in amd_select_drive_strength()
550 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
554 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()

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