| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| H A D | skl_scaler.c | 153 scaler_state->scalers[*scaler_id].in_use = 0; in skl_update_scaler()
364 if (scaler_state->scalers[j].in_use) in intel_atomic_setup_scaler()
368 scaler_state->scalers[*scaler_id].in_use = 1; in intel_atomic_setup_scaler()
405 * when only 1 scaler is in use on a pipe with 2 scalers in intel_atomic_setup_scaler()
409 scaler_state->scalers[*scaler_id].in_use = 0; in intel_atomic_setup_scaler()
411 scaler_state->scalers[0].in_use = 1; in intel_atomic_setup_scaler()
428 * FIXME: When two scalers are needed, but only one of in intel_atomic_setup_scaler()
479 scaler_state->scalers[*scaler_id].mode = mode; in intel_atomic_setup_scaler()
485 * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
488 * @crtc_state: incoming crtc_state to validate and setup scalers
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| H A D | intel_pmdemand.h | 30 u8 scalers; member
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| H A D | intel_pmdemand.c | 362 * Setting scalers to max as it can not be calculated during flips and in intel_pmdemand_atomic_check()
365 new_pmdemand_state->params.scalers = 7; in intel_pmdemand_atomic_check()
423 pmdemand_state->params.scalers = in intel_pmdemand_init_pmdemand_params()
511 update_reg(reg2, scalers, XELPDP_PMDEMAND_SCALERS_MASK); in intel_pmdemand_update_params()
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| H A D | intel_display_types.h | 723 * >= 0 : using a scalers
786 struct intel_scaler scalers[SKL_NUM_SCALERS]; member
789 * scaler_users: keeps track of users requesting scalers on this crtc.
801 * intel_atomic_setup_scalers will setup available scalers to users
802 * requesting scalers. It will gracefully fail if request exceeds
1499 /* scalers available on this crtc */
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| H A D | intel_display_debugfs.c | 448 &crtc_state->scaler_state.scalers[i]; in intel_scaler_info()
450 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", in intel_scaler_info()
455 seq_puts(m, "\tNo scalers available on this platform\n"); in intel_scaler_info()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| H A D | intel_atomic.c | 317 if (scaler_state->scalers[j].in_use) in intel_atomic_setup_scaler()
321 scaler_state->scalers[*scaler_id].in_use = 1; in intel_atomic_setup_scaler()
358 * when only 1 scaler is in use on a pipe with 2 scalers in intel_atomic_setup_scaler()
362 scaler_state->scalers[*scaler_id].in_use = 0; in intel_atomic_setup_scaler()
364 scaler_state->scalers[0].in_use = 1; in intel_atomic_setup_scaler()
372 scaler_state->scalers[*scaler_id].mode = mode; in intel_atomic_setup_scaler()
376 * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
379 * @crtc_state: incoming crtc_state to validate and setup scalers
381 * This function sets up scalers based on staged scaling requests for
383 * is a supportable request, it attaches scalers t
[all...] |
| H A D | intel_display_types.h | 548 * >= 0 : using a scalers
604 struct intel_scaler scalers[SKL_NUM_SCALERS]; member
607 * scaler_users: keeps track of users requesting scalers on this crtc.
619 * intel_atomic_setup_scalers will setup available scalers to users
620 * requesting scalers. It will gracefully fail if request exceeds
1146 /* scalers available on this crtc */
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| H A D | intel_display_debugfs.c | 834 &crtc_state->scaler_state.scalers[i]; in intel_scaler_info()
836 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", in intel_scaler_info()
841 seq_puts(m, "\tNo scalers available on this platform\n"); in intel_scaler_info()
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| H A D | intel_sprite.c | 424 &crtc_state->scaler_state.scalers[scaler_id]; in skl_program_scaler()
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| H A D | intel_display.c | 4574 * This function detaches (aka. unbinds) unused scalers in hardware
4583 /* loop through and disable scalers that aren't in use */ in skl_detach_scalers()
4585 if (!scaler_state->scalers[i].in_use) in skl_detach_scalers()
6107 scaler_state->scalers[*scaler_id].in_use = 0; in skl_update_scaler()
6316 PS_FILTER_MEDIUM | scaler_state->scalers[id].mode); in skl_pfit_enable()
10524 scaler_state->scalers[i].in_use = true; in skl_get_pfit_config()
15145 /* on skylake this is done by detaching scalers */ in intel_pipe_fastset()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_pipeline.c | 94 pos = to_cpos(pipe->scalers[id - KOMEDA_COMPONENT_SCALER0]); in komeda_pipeline_get_component_pos()
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| H A D | komeda_pipeline_state.c | 595 komeda_split_data_flow(splitter->base.pipeline->scalers[0], in komeda_splitter_validate()
843 struct komeda_scaler *scaler = layer->base.pipeline->scalers[0]; in komeda_complete_data_flow_cfg()
1096 komeda_split_data_flow(pipe->scalers[0], dflow, &l_dflow, &r_dflow); in komeda_build_layer_split_data_flow()
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| H A D | komeda_pipeline.h | 414 /** @n_scalers: the number of scaler on @scalers */
416 /** @scalers: the pipeline scalers */
417 struct komeda_scaler *scalers[KOMEDA_PIPELINE_MAX_SCALERS]; member
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| H A D | komeda_private_obj.c | 392 err = komeda_scaler_obj_add(kms, pipe->scalers[j]); in komeda_kms_add_private_objs()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_pipeline.c | 96 pos = to_cpos(pipe->scalers[id - KOMEDA_COMPONENT_SCALER0]); in komeda_pipeline_get_component_pos()
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| H A D | komeda_pipeline_state.c | 595 komeda_split_data_flow(splitter->base.pipeline->scalers[0], in komeda_splitter_validate()
843 struct komeda_scaler *scaler = layer->base.pipeline->scalers[0]; in komeda_complete_data_flow_cfg()
1096 komeda_split_data_flow(pipe->scalers[0], dflow, &l_dflow, &r_dflow); in komeda_build_layer_split_data_flow()
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| H A D | komeda_pipeline.h | 414 /** @n_scalers: the number of scaler on @scalers */
416 /** @scalers: the pipeline scalers */
417 struct komeda_scaler *scalers[KOMEDA_PIPELINE_MAX_SCALERS]; member
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| H A D | komeda_private_obj.c | 392 err = komeda_scaler_obj_add(kms, pipe->scalers[j]); in komeda_kms_add_private_objs()
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