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Searched refs:reg_bases (Results 1 - 9 of 9) sorted by relevance

/kernel/linux/linux-6.6/drivers/cpufreq/
H A Dmediatek-cpufreq-hw.c40 void __iomem *reg_bases[REG_ARRAY_SIZE]; member
77 *uW = readl_relaxed(data->reg_bases[REG_EM_POWER_TBL] + in mtk_cpufreq_get_cpu_power()
88 writel_relaxed(index, data->reg_bases[REG_FREQ_PERF_STATE]); in mtk_cpufreq_hw_target_index()
105 index = readl_relaxed(data->reg_bases[REG_FREQ_PERF_STATE]); in mtk_cpufreq_hw_get()
119 writel_relaxed(index, data->reg_bases[REG_FREQ_PERF_STATE]); in mtk_cpufreq_hw_fast_switch()
136 base_table = data->reg_bases[REG_FREQ_LUT_TABLE]; in mtk_cpu_create_freq_table()
205 data->reg_bases[i] = base + offsets[i]; in mtk_cpu_resources_init()
239 latency = readl_relaxed(data->reg_bases[REG_FREQ_LATENCY]) * 1000; in mtk_cpufreq_hw_cpu_init()
247 writel_relaxed(0x1, data->reg_bases[REG_FREQ_ENABLE]); in mtk_cpufreq_hw_cpu_init()
248 if (readl_poll_timeout(data->reg_bases[REG_FREQ_HW_STAT in mtk_cpufreq_hw_cpu_init()
[all...]
/kernel/linux/linux-5.10/drivers/staging/media/hantro/
H A Dhantro_drv.c774 vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases, in hantro_probe()
775 sizeof(*vpu->reg_bases), GFP_KERNEL); in hantro_probe()
776 if (!vpu->reg_bases) in hantro_probe()
784 vpu->reg_bases[i] = devm_ioremap_resource(vpu->dev, res); in hantro_probe()
785 if (IS_ERR(vpu->reg_bases[i])) in hantro_probe()
786 return PTR_ERR(vpu->reg_bases[i]); in hantro_probe()
788 vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; in hantro_probe()
789 vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; in hantro_probe()
H A Dimx8m_vpu_hw.c153 vpu->dec_base = vpu->reg_bases[0]; in imx8mq_vpu_hw_init()
154 vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; in imx8mq_vpu_hw_init()
H A Dhantro.h167 * @reg_bases: Mapped addresses of VPU registers.
186 void __iomem **reg_bases; member
/kernel/linux/linux-6.6/drivers/media/platform/verisilicon/
H A Dhantro_drv.c1046 vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases, in hantro_probe()
1047 sizeof(*vpu->reg_bases), GFP_KERNEL); in hantro_probe()
1048 if (!vpu->reg_bases) in hantro_probe()
1052 vpu->reg_bases[i] = vpu->variant->reg_names ? in hantro_probe()
1055 if (IS_ERR(vpu->reg_bases[i])) in hantro_probe()
1056 return PTR_ERR(vpu->reg_bases[i]); in hantro_probe()
1058 vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; in hantro_probe()
1059 vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; in hantro_probe()
H A Dimx8m_vpu_hw.c257 vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; in imx8mq_vpu_hw_init()
H A Dhantro.h185 * @reg_bases: Mapped addresses of VPU registers.
205 void __iomem **reg_bases; member
/kernel/linux/linux-5.10/arch/arm/mach-lpc32xx/
H A Dsuspend.S44 adr WORK1_REG, reg_bases
141 reg_bases: label
/kernel/linux/linux-6.6/arch/arm/mach-lpc32xx/
H A Dsuspend.S42 adr WORK1_REG, reg_bases
139 reg_bases: label

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