/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
H A D | pllgt215.c | 42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc() 44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc() 50 N = tmp / info->refclk; in gt215_pll_calc() 51 fN = tmp % info->refclk; in gt215_pll_calc() 54 if (fN >= info->refclk / 2) in gt215_pll_calc() 57 if (fN < info->refclk / 2) in gt215_pll_calc() 59 fN = tmp - (N * info->refclk); in gt215_pll_calc() 67 err = abs(freq - (info->refclk * N / M / *P)); in gt215_pll_calc() 75 *pfN = ((fN << 13) + info->refclk / 2) / info->refclk; in gt215_pll_calc() [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
H A D | pllgt215.c | 42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc() 44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc() 50 N = tmp / info->refclk; in gt215_pll_calc() 51 fN = tmp % info->refclk; in gt215_pll_calc() 54 if (fN >= info->refclk / 2) in gt215_pll_calc() 57 if (fN < info->refclk / 2) in gt215_pll_calc() 59 fN = tmp - (N * info->refclk); in gt215_pll_calc() 67 err = abs(freq - (info->refclk * N / M / *P)); in gt215_pll_calc() 75 *pfN = ((fN << 13) + info->refclk / 2) / info->refclk; in gt215_pll_calc() [all...] |
/kernel/linux/linux-5.10/drivers/phy/ti/ |
H A D | phy-dm816x-usb.c | 56 struct clk *refclk; member 86 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init() 87 dev_warn(phy->dev, "nonstandard phy refclk\n"); in dm816x_usb_phy_init() 133 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_suspend() 144 error = clk_enable(phy->refclk); in dm816x_usb_phy_runtime_resume() 161 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_resume() 236 phy->refclk = devm_clk_get(phy->dev, "refclk"); in dm816x_usb_phy_probe() 237 if (IS_ERR(phy->refclk)) in dm816x_usb_phy_probe() 238 return PTR_ERR(phy->refclk); in dm816x_usb_phy_probe() [all...] |
H A D | phy-ti-pipe3.c | 171 struct clk *refclk; member 607 phy->refclk = devm_clk_get(dev, "refclk"); in ti_pipe3_get_clk() 608 if (IS_ERR(phy->refclk)) { in ti_pipe3_get_clk() 609 dev_err(dev, "unable to get refclk\n"); in ti_pipe3_get_clk() 610 /* older DTBs have missing refclk in SATA PHY in ti_pipe3_get_clk() 614 return PTR_ERR(phy->refclk); in ti_pipe3_get_clk() 829 * Prevent auto-disable of refclk for SATA PHY due to Errata i783 in ti_pipe3_probe() 832 if (!IS_ERR(phy->refclk)) { in ti_pipe3_probe() 833 clk_prepare_enable(phy->refclk); in ti_pipe3_probe() [all...] |
/kernel/linux/linux-6.6/drivers/phy/ti/ |
H A D | phy-dm816x-usb.c | 47 struct clk *refclk; member 77 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init() 78 dev_warn(phy->dev, "nonstandard phy refclk\n"); in dm816x_usb_phy_init() 124 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_suspend() 135 error = clk_enable(phy->refclk); in dm816x_usb_phy_runtime_resume() 152 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_resume() 227 phy->refclk = devm_clk_get(phy->dev, "refclk"); in dm816x_usb_phy_probe() 228 if (IS_ERR(phy->refclk)) in dm816x_usb_phy_probe() 229 return PTR_ERR(phy->refclk); in dm816x_usb_phy_probe() [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
H A D | intel_cdclk.c | 1227 u16 refclk; member 1234 { .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 }, 1235 { .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 }, 1236 { .refclk = 19200, .cdclk = 384000, .divider = 3, .ratio = 60 }, 1237 { .refclk = 19200, .cdclk = 576000, .divider = 2, .ratio = 60 }, 1238 { .refclk = 19200, .cdclk = 624000, .divider = 2, .ratio = 65 }, 1243 { .refclk = 19200, .cdclk = 79200, .divider = 8, .ratio = 33 }, 1244 { .refclk = 19200, .cdclk = 158400, .divider = 4, .ratio = 33 }, 1245 { .refclk = 19200, .cdclk = 316800, .divider = 2, .ratio = 33 }, 1250 { .refclk [all...] |
H A D | intel_dpll.c | 234 /* LVDS 100mhz refclk limits. */ 313 int pnv_calc_dpll_params(int refclk, struct dpll *clock) in pnv_calc_dpll_params() argument 319 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in pnv_calc_dpll_params() 330 int i9xx_calc_dpll_params(int refclk, struct dpll *clock) in i9xx_calc_dpll_params() argument 336 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2); in i9xx_calc_dpll_params() 342 int vlv_calc_dpll_params(int refclk, struct dpll *clock) in vlv_calc_dpll_params() argument 348 clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n); in vlv_calc_dpll_params() 354 int chv_calc_dpll_params(int refclk, struct dpll *clock) in chv_calc_dpll_params() argument 360 clock->vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, clock->m), in chv_calc_dpll_params() 368 * Returns whether the given set of divisors are valid for a given refclk wit 441 i9xx_find_best_dpll(const struct intel_limit *limit, struct intel_crtc_state *crtc_state, int target, int refclk, const struct dpll *match_clock, struct dpll *best_clock) i9xx_find_best_dpll() argument 499 pnv_find_best_dpll(const struct intel_limit *limit, struct intel_crtc_state *crtc_state, int target, int refclk, const struct dpll *match_clock, struct dpll *best_clock) pnv_find_best_dpll() argument 555 g4x_find_best_dpll(const struct intel_limit *limit, struct intel_crtc_state *crtc_state, int target, int refclk, const struct dpll *match_clock, struct dpll *best_clock) g4x_find_best_dpll() argument 649 vlv_find_best_dpll(const struct intel_limit *limit, struct intel_crtc_state *crtc_state, int target, int refclk, const struct dpll *match_clock, struct dpll *best_clock) vlv_find_best_dpll() argument 707 chv_find_best_dpll(const struct intel_limit *limit, struct intel_crtc_state *crtc_state, int target, int refclk, const struct dpll *match_clock, struct dpll *best_clock) chv_find_best_dpll() argument 769 int refclk = 100000; bxt_find_best_dpll() local 1147 int refclk = 120000; ilk_crtc_compute_clock() local 1249 int refclk = 100000; chv_crtc_compute_clock() local 1274 int refclk = 100000; vlv_crtc_compute_clock() local 1301 int refclk = 96000; g4x_crtc_compute_clock() local 1348 int refclk = 96000; pnv_crtc_compute_clock() local 1384 int refclk = 96000; i9xx_crtc_compute_clock() local 1422 int refclk = 48000; i8xx_crtc_compute_clock() local [all...] |
H A D | intel_dpll.h | 23 int vlv_calc_dpll_params(int refclk, struct dpll *clock); 24 int pnv_calc_dpll_params(int refclk, struct dpll *clock); 25 int i9xx_calc_dpll_params(int refclk, struct dpll *clock); 42 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
|
/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/ |
H A D | gma_display.h | 44 int target, int refclk, 49 void (*clock)(int refclk, struct gma_clock_t *clock); 50 const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk); 83 extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk); 84 extern void gma_clock(int refclk, struct gma_clock_t *clock); 89 struct drm_crtc *crtc, int target, int refclk,
|
H A D | cdv_intel_display.c | 25 int refclk, struct gma_clock_t *best_clock); 365 int refclk) in cdv_intel_limit() 373 if (refclk == 96000) in cdv_intel_limit() 379 if (refclk == 27000) in cdv_intel_limit() 384 if (refclk == 27000) in cdv_intel_limit() 393 static void cdv_intel_clock(int refclk, struct gma_clock_t *clock) in cdv_intel_clock() argument 397 clock->vco = (refclk * clock->m) / clock->n; in cdv_intel_clock() 403 int refclk, in cdv_intel_find_dp_pll() 411 switch (refclk) { in cdv_intel_find_dp_pll() 448 gma_crtc->clock_funcs->clock(refclk, in cdv_intel_find_dp_pll() 364 cdv_intel_limit(struct drm_crtc *crtc, int refclk) cdv_intel_limit() argument 401 cdv_intel_find_dp_pll(const struct gma_limit_t *limit, struct drm_crtc *crtc, int target, int refclk, struct gma_clock_t *best_clock) cdv_intel_find_dp_pll() argument 582 int refclk; cdv_intel_crtc_mode_set() local 826 i8xx_clock(int refclk, struct gma_clock_t *clock) i8xx_clock() argument [all...] |
H A D | oaktrail_crtc.c | 41 int refclk, struct gma_clock_t *best_clock); 45 int refclk, struct gma_clock_t *best_clock); 84 int refclk) in mrst_limit() 113 /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */ 114 static void mrst_lvds_clock(int refclk, struct gma_clock_t *clock) in mrst_lvds_clock() argument 116 clock->dot = (refclk * clock->m) / (14 * clock->p1); in mrst_lvds_clock() 128 int refclk, struct gma_clock_t *best_clock) in mrst_sdvo_find_best_pll() 153 actual_freq = (refclk * clock.m) / in mrst_sdvo_find_best_pll() 181 * Returns a set of divisors for the desired target clock with the given refclk, 186 int refclk, struc in mrst_lvds_find_best_pll() 83 mrst_limit(struct drm_crtc *crtc, int refclk) mrst_limit() argument 126 mrst_sdvo_find_best_pll(const struct gma_limit_t *limit, struct drm_crtc *crtc, int target, int refclk, struct gma_clock_t *best_clock) mrst_sdvo_find_best_pll() argument 184 mrst_lvds_find_best_pll(const struct gma_limit_t *limit, struct drm_crtc *crtc, int target, int refclk, struct gma_clock_t *best_clock) mrst_lvds_find_best_pll() argument 370 int refclk = 0; oaktrail_crtc_mode_set() local [all...] |
/kernel/linux/linux-5.10/drivers/net/ethernet/arc/ |
H A D | emac_rockchip.c | 32 struct clk *refclk; member 147 priv->refclk = devm_clk_get(dev, "macref"); in emac_rockchip_probe() 148 if (IS_ERR(priv->refclk)) { in emac_rockchip_probe() 150 PTR_ERR(priv->refclk)); in emac_rockchip_probe() 151 err = PTR_ERR(priv->refclk); in emac_rockchip_probe() 155 err = clk_prepare_enable(priv->refclk); in emac_rockchip_probe() 195 err = clk_set_rate(priv->refclk, 50000000); in emac_rockchip_probe() 241 clk_disable_unprepare(priv->refclk); in emac_rockchip_probe() 255 clk_disable_unprepare(priv->refclk); in emac_rockchip_remove()
|
/kernel/linux/linux-6.6/drivers/net/ethernet/arc/ |
H A D | emac_rockchip.c | 32 struct clk *refclk; member 147 priv->refclk = devm_clk_get(dev, "macref"); in emac_rockchip_probe() 148 if (IS_ERR(priv->refclk)) { in emac_rockchip_probe() 150 PTR_ERR(priv->refclk)); in emac_rockchip_probe() 151 err = PTR_ERR(priv->refclk); in emac_rockchip_probe() 155 err = clk_prepare_enable(priv->refclk); in emac_rockchip_probe() 195 err = clk_set_rate(priv->refclk, 50000000); in emac_rockchip_probe() 241 clk_disable_unprepare(priv->refclk); in emac_rockchip_probe() 254 clk_disable_unprepare(priv->refclk); in emac_rockchip_remove()
|
/kernel/linux/linux-5.10/drivers/phy/xilinx/ |
H A D | phy-zynqmp.c | 192 * @refclk: reference clock index 201 unsigned int refclk; member 343 ssc = gtr_phy->dev->refclk_sscs[gtr_phy->refclk]; in xpsgtr_configure_pll() 350 if (gtr_phy->refclk != gtr_phy->lane) { in xpsgtr_configure_pll() 353 L0_REF_CLK_SEL_MASK, 1 << gtr_phy->refclk); in xpsgtr_configure_pll() 765 unsigned int refclk; in xpsgtr_xlate() local 794 refclk = args->args[3]; in xpsgtr_xlate() 795 if (refclk >= ARRAY_SIZE(gtr_dev->refclk_sscs) || in xpsgtr_xlate() 796 !gtr_dev->refclk_sscs[refclk]) { in xpsgtr_xlate() 797 dev_err(dev, "Invalid reference clock number %u\n", refclk); in xpsgtr_xlate() 868 unsigned int refclk; xpsgtr_get_ref_clocks() local [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
H A D | gma_display.h | 44 int target, int refclk, 49 void (*clock)(int refclk, struct gma_clock_t *clock); 50 const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk); 91 extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk); 92 extern void gma_clock(int refclk, struct gma_clock_t *clock); 97 struct drm_crtc *crtc, int target, int refclk,
|
H A D | cdv_intel_display.c | 24 int refclk, struct gma_clock_t *best_clock); 364 int refclk) in cdv_intel_limit() 372 if (refclk == 96000) in cdv_intel_limit() 378 if (refclk == 27000) in cdv_intel_limit() 383 if (refclk == 27000) in cdv_intel_limit() 392 static void cdv_intel_clock(int refclk, struct gma_clock_t *clock) in cdv_intel_clock() argument 396 clock->vco = (refclk * clock->m) / clock->n; in cdv_intel_clock() 402 int refclk, in cdv_intel_find_dp_pll() 410 switch (refclk) { in cdv_intel_find_dp_pll() 447 gma_crtc->clock_funcs->clock(refclk, in cdv_intel_find_dp_pll() 363 cdv_intel_limit(struct drm_crtc *crtc, int refclk) cdv_intel_limit() argument 400 cdv_intel_find_dp_pll(const struct gma_limit_t *limit, struct drm_crtc *crtc, int target, int refclk, struct gma_clock_t *best_clock) cdv_intel_find_dp_pll() argument 581 int refclk; cdv_intel_crtc_mode_set() local 829 i8xx_clock(int refclk, struct gma_clock_t *clock) i8xx_clock() argument [all...] |
H A D | oaktrail_crtc.c | 38 int refclk, struct gma_clock_t *best_clock); 42 int refclk, struct gma_clock_t *best_clock); 81 int refclk) in mrst_limit() 110 /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */ 111 static void mrst_lvds_clock(int refclk, struct gma_clock_t *clock) in mrst_lvds_clock() argument 113 clock->dot = (refclk * clock->m) / (14 * clock->p1); in mrst_lvds_clock() 125 int refclk, struct gma_clock_t *best_clock) in mrst_sdvo_find_best_pll() 150 actual_freq = (refclk * clock.m) / in mrst_sdvo_find_best_pll() 178 * Returns a set of divisors for the desired target clock with the given refclk, 183 int refclk, struc in mrst_lvds_find_best_pll() 80 mrst_limit(struct drm_crtc *crtc, int refclk) mrst_limit() argument 123 mrst_sdvo_find_best_pll(const struct gma_limit_t *limit, struct drm_crtc *crtc, int target, int refclk, struct gma_clock_t *best_clock) mrst_sdvo_find_best_pll() argument 181 mrst_lvds_find_best_pll(const struct gma_limit_t *limit, struct drm_crtc *crtc, int target, int refclk, struct gma_clock_t *best_clock) mrst_lvds_find_best_pll() argument 367 int refclk = 0; oaktrail_crtc_mode_set() local [all...] |
/kernel/linux/linux-5.10/drivers/net/phy/ |
H A D | smsc.c | 48 struct clk *refclk; member 268 clk_disable_unprepare(priv->refclk); in smsc_phy_remove() 269 clk_put(priv->refclk); in smsc_phy_remove() 291 priv->refclk = clk_get_optional(dev, NULL); in smsc_phy_probe() 292 if (IS_ERR(priv->refclk)) in smsc_phy_probe() 293 return dev_err_probe(dev, PTR_ERR(priv->refclk), in smsc_phy_probe() 296 ret = clk_prepare_enable(priv->refclk); in smsc_phy_probe() 300 ret = clk_set_rate(priv->refclk, 50 * 1000 * 1000); in smsc_phy_probe() 302 clk_disable_unprepare(priv->refclk); in smsc_phy_probe()
|
/kernel/linux/linux-6.6/drivers/phy/xilinx/ |
H A D | phy-zynqmp.c | 192 * @refclk: reference clock index 201 unsigned int refclk; member 345 ssc = gtr_phy->dev->refclk_sscs[gtr_phy->refclk]; in xpsgtr_configure_pll() 352 if (gtr_phy->refclk != gtr_phy->lane) { in xpsgtr_configure_pll() 355 L0_REF_CLK_SEL_MASK, 1 << gtr_phy->refclk); in xpsgtr_configure_pll() 778 unsigned int refclk; in xpsgtr_xlate() local 807 refclk = args->args[3]; in xpsgtr_xlate() 808 if (refclk >= ARRAY_SIZE(gtr_dev->refclk_sscs) || in xpsgtr_xlate() 809 !gtr_dev->refclk_sscs[refclk]) { in xpsgtr_xlate() 810 dev_err(dev, "Invalid reference clock number %u\n", refclk); in xpsgtr_xlate() 879 unsigned int refclk; xpsgtr_get_ref_clocks() local [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
H A D | intel_cdclk.c | 1186 { .refclk = 19200, .cdclk = 144000, .divider = 8, .ratio = 60 }, 1187 { .refclk = 19200, .cdclk = 288000, .divider = 4, .ratio = 60 }, 1188 { .refclk = 19200, .cdclk = 384000, .divider = 3, .ratio = 60 }, 1189 { .refclk = 19200, .cdclk = 576000, .divider = 2, .ratio = 60 }, 1190 { .refclk = 19200, .cdclk = 624000, .divider = 2, .ratio = 65 }, 1195 { .refclk = 19200, .cdclk = 79200, .divider = 8, .ratio = 33 }, 1196 { .refclk = 19200, .cdclk = 158400, .divider = 4, .ratio = 33 }, 1197 { .refclk = 19200, .cdclk = 316800, .divider = 2, .ratio = 33 }, 1202 { .refclk = 19200, .cdclk = 168000, .divider = 4, .ratio = 35 }, 1203 { .refclk [all...] |
/kernel/linux/linux-5.10/drivers/phy/ |
H A D | phy-pistachio-usb.c | 38 unsigned int refclk; member 68 p_phy->refclk << USB_PHY_STRAP_CONTROL_REFCLK_SHIFT); in pistachio_usb_phy_power_on() 71 if (p_phy->refclk == REFCLK_XO_CRYSTAL && rate != 12000000) { in pistachio_usb_phy_power_on() 160 ret = of_property_read_u32(p_phy->dev->of_node, "img,refclk", in pistachio_usb_phy_probe() 161 &p_phy->refclk); in pistachio_usb_phy_probe()
|
/kernel/linux/linux-6.6/drivers/phy/ |
H A D | phy-pistachio-usb.c | 38 unsigned int refclk; member 68 p_phy->refclk << USB_PHY_STRAP_CONTROL_REFCLK_SHIFT); in pistachio_usb_phy_power_on() 71 if (p_phy->refclk == REFCLK_XO_CRYSTAL && rate != 12000000) { in pistachio_usb_phy_power_on() 160 ret = of_property_read_u32(p_phy->dev->of_node, "img,refclk", in pistachio_usb_phy_probe() 161 &p_phy->refclk); in pistachio_usb_phy_probe()
|
/kernel/linux/linux-5.10/drivers/spi/ |
H A D | spi-zynq-qspi.c | 124 * @refclk: Pointer to the peripheral clock 136 struct clk *refclk; member 348 (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) > in zynq_qspi_config_op() 386 clk_enable(qspi->refclk); in zynq_qspi_setup_op() 662 xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); in zynq_qspi_probe() 663 if (IS_ERR(xqspi->refclk)) { in zynq_qspi_probe() 665 ret = PTR_ERR(xqspi->refclk); in zynq_qspi_probe() 675 ret = clk_prepare_enable(xqspi->refclk); in zynq_qspi_probe() 710 ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; in zynq_qspi_probe() 725 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_probe() [all...] |
/kernel/linux/linux-6.6/drivers/spi/ |
H A D | spi-zynq-qspi.c | 124 * @refclk: Pointer to the peripheral clock 136 struct clk *refclk; member 348 (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) > in zynq_qspi_config_op() 386 clk_enable(qspi->refclk); in zynq_qspi_setup_op() 662 xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); in zynq_qspi_probe() 663 if (IS_ERR(xqspi->refclk)) { in zynq_qspi_probe() 665 ret = PTR_ERR(xqspi->refclk); in zynq_qspi_probe() 675 ret = clk_prepare_enable(xqspi->refclk); in zynq_qspi_probe() 710 ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; in zynq_qspi_probe() 725 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_probe() [all...] |
/kernel/linux/linux-5.10/drivers/net/ethernet/ti/ |
H A D | cpts.c | 571 err = clk_enable(cpts->refclk); in cpts_register() 592 clk_disable(cpts->refclk); in cpts_register() 612 clk_disable(cpts->refclk); in cpts_unregister() 621 freq = clk_get_rate(cpts->refclk); in cpts_calc_mult_shift() 662 refclk_np = of_get_child_by_name(node, "cpts-refclk-mux"); in cpts_of_mux_clk_setup() 664 /* refclk selection supported not for all SoCs */ in cpts_of_mux_clk_setup() 772 cpts->refclk = devm_get_clk_from_child(dev, node, "cpts"); in cpts_create() 773 if (IS_ERR(cpts->refclk)) in cpts_create() 775 cpts->refclk = devm_clk_get(dev, "cpts"); in cpts_create() 777 if (IS_ERR(cpts->refclk)) { in cpts_create() [all...] |