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Searched refs:rd_ptr_irq (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_pingpong.h28 u32 rd_ptr_irq; member
H A Ddpu_encoder_phys_cmd.c108 DPU_ATRACE_BEGIN("rd_ptr_irq"); in dpu_encoder_phys_cmd_pp_rd_ptr_irq()
117 DPU_ATRACE_END("rd_ptr_irq"); in dpu_encoder_phys_cmd_pp_rd_ptr_irq()
384 tc_cfg.rd_ptr_irq = mode->vdisplay + 1; in dpu_encoder_phys_cmd_tearcheck_config()
391 "tc %d enable %u start_pos %u rd_ptr_irq %u\n", in dpu_encoder_phys_cmd_tearcheck_config()
393 tc_cfg.rd_ptr_irq); in dpu_encoder_phys_cmd_tearcheck_config()
H A Ddpu_hw_pingpong.c112 DPU_REG_WRITE(c, PP_RD_PTR_IRQ, te->rd_ptr_irq); in dpu_hw_pp_setup_te_config()
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_mdss.h475 * @rd_ptr_irq: The read pointer line at which interrupt has to be generated
489 u32 rd_ptr_irq; member
H A Ddpu_encoder_phys_cmd.c119 DPU_ATRACE_BEGIN("rd_ptr_irq"); in dpu_encoder_phys_cmd_te_rd_ptr_irq()
126 DPU_ATRACE_END("rd_ptr_irq"); in dpu_encoder_phys_cmd_te_rd_ptr_irq()
386 tc_cfg.rd_ptr_irq = mode->vdisplay + 1; in dpu_encoder_phys_cmd_tearcheck_config()
392 "tc enable %u start_pos %u rd_ptr_irq %u\n", in dpu_encoder_phys_cmd_tearcheck_config()
393 tc_enable, tc_cfg.start_pos, tc_cfg.rd_ptr_irq); in dpu_encoder_phys_cmd_tearcheck_config()
H A Ddpu_hw_pingpong.c95 DPU_REG_WRITE(c, PP_RD_PTR_IRQ, te->rd_ptr_irq); in dpu_hw_pp_enable_te()
H A Ddpu_hw_intf.c354 DPU_REG_WRITE(c, INTF_TEAR_RD_PTR_IRQ, te->rd_ptr_irq); in dpu_hw_intf_enable_te()

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