Searched refs:rb_mask (Results 1 - 7 of 7) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v6_0.c | 1374 u32 raster_config, unsigned rb_mask, in gfx_v6_0_write_harvested_raster_configs()
1384 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1385 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1386 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1387 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1408 pkr0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1409 pkr1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1423 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1424 rb1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1439 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1373 gfx_v6_0_write_harvested_raster_configs(struct amdgpu_device *adev, u32 raster_config, unsigned rb_mask, unsigned num_rb) gfx_v6_0_write_harvested_raster_configs() argument
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| H A D | gfx_v7_0.c | 1672 unsigned rb_mask, unsigned num_rb) in gfx_v7_0_write_harvested_raster_configs()
1681 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1682 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1683 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1684 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1719 pkr0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1720 pkr1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1735 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1736 rb1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1752 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1670 gfx_v7_0_write_harvested_raster_configs(struct amdgpu_device *adev, u32 raster_config, u32 raster_config_1, unsigned rb_mask, unsigned num_rb) gfx_v7_0_write_harvested_raster_configs() argument
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| H A D | gfx_v8_0.c | 3519 unsigned rb_mask, unsigned num_rb) in gfx_v8_0_write_harvested_raster_configs()
3528 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3529 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3530 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3531 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3566 pkr0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3567 pkr1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3582 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3583 rb1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3599 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3517 gfx_v8_0_write_harvested_raster_configs(struct amdgpu_device *adev, u32 raster_config, u32 raster_config_1, unsigned rb_mask, unsigned num_rb) gfx_v8_0_write_harvested_raster_configs() argument
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v6_0.c | 1360 u32 raster_config, unsigned rb_mask, in gfx_v6_0_write_harvested_raster_configs()
1370 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1371 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1372 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1373 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1394 pkr0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1395 pkr1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1409 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1410 rb1_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1425 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1359 gfx_v6_0_write_harvested_raster_configs(struct amdgpu_device *adev, u32 raster_config, unsigned rb_mask, unsigned num_rb) gfx_v6_0_write_harvested_raster_configs() argument
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| H A D | gfx_v7_0.c | 1637 unsigned rb_mask, unsigned num_rb) in gfx_v7_0_write_harvested_raster_configs()
1646 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1647 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1648 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1649 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1684 pkr0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1685 pkr1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1700 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1701 rb1_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1717 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1635 gfx_v7_0_write_harvested_raster_configs(struct amdgpu_device *adev, u32 raster_config, u32 raster_config_1, unsigned rb_mask, unsigned num_rb) gfx_v7_0_write_harvested_raster_configs() argument
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| H A D | gfx_v8_0.c | 3486 unsigned rb_mask, unsigned num_rb) in gfx_v8_0_write_harvested_raster_configs()
3495 se_mask[0] = ((1 << rb_per_se) - 1) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3496 se_mask[1] = (se_mask[0] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3497 se_mask[2] = (se_mask[1] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3498 se_mask[3] = (se_mask[2] << rb_per_se) & rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3533 pkr0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3534 pkr1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3549 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3550 rb1_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3566 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3484 gfx_v8_0_write_harvested_raster_configs(struct amdgpu_device *adev, u32 raster_config, u32 raster_config_1, unsigned rb_mask, unsigned num_rb) gfx_v8_0_write_harvested_raster_configs() argument
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| H A D | gfx_v11_0.c | 1579 u32 rb_mask; in gfx_v11_0_get_rb_active_bitmap() local
1589 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v11_0_get_rb_active_bitmap()
1592 return rb_mask & (~(gc_disabled_rb_mask | gc_user_disabled_rb_mask)); in gfx_v11_0_get_rb_active_bitmap()
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