Home
last modified time | relevance | path

Searched refs:rb0_mask (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c1420 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v6_0_write_harvested_raster_configs() local
1421 unsigned rb1_mask = rb0_mask << 1; in gfx_v6_0_write_harvested_raster_configs()
1423 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1425 if (!rb0_mask || !rb1_mask) { in gfx_v6_0_write_harvested_raster_configs()
1428 if (!rb0_mask) in gfx_v6_0_write_harvested_raster_configs()
1437 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v6_0_write_harvested_raster_configs()
1438 rb1_mask = rb0_mask << 1; in gfx_v6_0_write_harvested_raster_configs()
1439 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1441 if (!rb0_mask || !rb1_mask) { in gfx_v6_0_write_harvested_raster_configs()
1444 if (!rb0_mask) in gfx_v6_0_write_harvested_raster_configs()
[all...]
H A Dgfx_v7_0.c1732 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v7_0_write_harvested_raster_configs() local
1733 unsigned rb1_mask = rb0_mask << 1; in gfx_v7_0_write_harvested_raster_configs()
1735 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1737 if (!rb0_mask || !rb1_mask) { in gfx_v7_0_write_harvested_raster_configs()
1740 if (!rb0_mask) { in gfx_v7_0_write_harvested_raster_configs()
1750 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v7_0_write_harvested_raster_configs()
1751 rb1_mask = rb0_mask << 1; in gfx_v7_0_write_harvested_raster_configs()
1752 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1754 if (!rb0_mask || !rb1_mask) { in gfx_v7_0_write_harvested_raster_configs()
1757 if (!rb0_mask) { in gfx_v7_0_write_harvested_raster_configs()
[all...]
H A Dgfx_v8_0.c3579 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v8_0_write_harvested_raster_configs() local
3580 unsigned rb1_mask = rb0_mask << 1; in gfx_v8_0_write_harvested_raster_configs()
3582 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3584 if (!rb0_mask || !rb1_mask) { in gfx_v8_0_write_harvested_raster_configs()
3587 if (!rb0_mask) { in gfx_v8_0_write_harvested_raster_configs()
3597 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v8_0_write_harvested_raster_configs()
3598 rb1_mask = rb0_mask << 1; in gfx_v8_0_write_harvested_raster_configs()
3599 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3601 if (!rb0_mask || !rb1_mask) { in gfx_v8_0_write_harvested_raster_configs()
3604 if (!rb0_mask) { in gfx_v8_0_write_harvested_raster_configs()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c1406 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v6_0_write_harvested_raster_configs() local
1407 unsigned rb1_mask = rb0_mask << 1; in gfx_v6_0_write_harvested_raster_configs()
1409 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1411 if (!rb0_mask || !rb1_mask) { in gfx_v6_0_write_harvested_raster_configs()
1414 if (!rb0_mask) in gfx_v6_0_write_harvested_raster_configs()
1423 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v6_0_write_harvested_raster_configs()
1424 rb1_mask = rb0_mask << 1; in gfx_v6_0_write_harvested_raster_configs()
1425 rb0_mask &= rb_mask; in gfx_v6_0_write_harvested_raster_configs()
1427 if (!rb0_mask || !rb1_mask) { in gfx_v6_0_write_harvested_raster_configs()
1430 if (!rb0_mask) in gfx_v6_0_write_harvested_raster_configs()
[all...]
H A Dgfx_v7_0.c1697 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v7_0_write_harvested_raster_configs() local
1698 unsigned rb1_mask = rb0_mask << 1; in gfx_v7_0_write_harvested_raster_configs()
1700 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1702 if (!rb0_mask || !rb1_mask) { in gfx_v7_0_write_harvested_raster_configs()
1705 if (!rb0_mask) { in gfx_v7_0_write_harvested_raster_configs()
1715 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v7_0_write_harvested_raster_configs()
1716 rb1_mask = rb0_mask << 1; in gfx_v7_0_write_harvested_raster_configs()
1717 rb0_mask &= rb_mask; in gfx_v7_0_write_harvested_raster_configs()
1719 if (!rb0_mask || !rb1_mask) { in gfx_v7_0_write_harvested_raster_configs()
1722 if (!rb0_mask) { in gfx_v7_0_write_harvested_raster_configs()
[all...]
H A Dgfx_v8_0.c3546 unsigned rb0_mask = 1 << (se * rb_per_se); in gfx_v8_0_write_harvested_raster_configs() local
3547 unsigned rb1_mask = rb0_mask << 1; in gfx_v8_0_write_harvested_raster_configs()
3549 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3551 if (!rb0_mask || !rb1_mask) { in gfx_v8_0_write_harvested_raster_configs()
3554 if (!rb0_mask) { in gfx_v8_0_write_harvested_raster_configs()
3564 rb0_mask = 1 << (se * rb_per_se + rb_per_pkr); in gfx_v8_0_write_harvested_raster_configs()
3565 rb1_mask = rb0_mask << 1; in gfx_v8_0_write_harvested_raster_configs()
3566 rb0_mask &= rb_mask; in gfx_v8_0_write_harvested_raster_configs()
3568 if (!rb0_mask || !rb1_mask) { in gfx_v8_0_write_harvested_raster_configs()
3571 if (!rb0_mask) { in gfx_v8_0_write_harvested_raster_configs()
[all...]

Completed in 22 milliseconds