Home
last modified time | relevance | path

Searched refs:pp_atomfwctrl_get_gpu_pll_dividers_vega10 (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomfwctrl.h218 int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr,
H A Dvega10_hwmgr.c1499 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10( in vega10_populate_single_lclk_level()
1641 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_gfx_level()
1701 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_soc_level()
1842 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10( in vega10_populate_single_memory_level()
1989 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_eclock_level()
2041 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_vclock_level()
2057 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_dclock_level()
H A Dppatomfwctrl.c239 /** pp_atomfwctrl_get_gpu_pll_dividers_vega10().
246 int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr, in pp_atomfwctrl_get_gpu_pll_dividers_vega10() function
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomfwctrl.h217 int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr,
H A Dppatomfwctrl.c239 /** pp_atomfwctrl_get_gpu_pll_dividers_vega10().
246 int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr, in pp_atomfwctrl_get_gpu_pll_dividers_vega10() function
H A Dvega10_hwmgr.c1494 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10( in vega10_populate_single_lclk_level()
1637 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_gfx_level()
1699 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_soc_level()
1841 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10( in vega10_populate_single_memory_level()
1989 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_eclock_level()
2041 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_vclock_level()
2057 PP_ASSERT_WITH_CODE(!pp_atomfwctrl_get_gpu_pll_dividers_vega10(hwmgr, in vega10_populate_single_dclock_level()

Completed in 17 milliseconds