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Searched refs:powerplay_table (Results 1 - 23 of 23) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dprocesspptables.c51 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_table_offset()
55 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_vce_table_offset()
58 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_vce_table_offset()
75 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_info_array_offset()
78 powerplay_table); in get_vce_clock_info_array_offset()
87 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_info_array_size()
90 powerplay_table); in get_vce_clock_info_array_size()
95 (((unsigned long) powerplay_table) + table_offset); in get_vce_clock_info_array_size()
103 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_voltage_limit_table_offset()
106 powerplay_table); in get_vce_clock_voltage_limit_table_offset()
50 get_vce_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_table_offset() argument
74 get_vce_clock_info_array_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_clock_info_array_offset() argument
86 get_vce_clock_info_array_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_clock_info_array_size() argument
102 get_vce_clock_voltage_limit_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_clock_voltage_limit_table_offset() argument
115 get_vce_clock_voltage_limit_table_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_clock_voltage_limit_table_size() argument
130 get_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_state_table_offset() argument
140 get_vce_state_table( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_state_table() argument
152 get_uvd_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_uvd_table_offset() argument
174 get_uvd_clock_info_array_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_uvd_clock_info_array_offset() argument
185 get_uvd_clock_info_array_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_uvd_clock_info_array_size() argument
203 get_uvd_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_uvd_clock_voltage_limit_table_offset() argument
217 get_samu_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_samu_table_offset() argument
240 get_samu_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_samu_clock_voltage_limit_table_offset() argument
253 get_acp_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_acp_table_offset() argument
276 get_acp_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_acp_clock_voltage_limit_table_offset() argument
288 get_cacp_tdp_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_cacp_tdp_table_offset() argument
340 get_sclk_vdd_gfx_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_sclk_vdd_gfx_table_offset() argument
364 get_sclk_vdd_gfx_clock_voltage_dependency_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_sclk_vdd_gfx_clock_voltage_dependency_table_offset() argument
871 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); pp_tables_get_num_of_entries() local
896 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); pp_tables_get_entry() local
985 init_thermal_controller( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_thermal_controller() argument
1117 init_overdrive_limits_V1_4(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, const ATOM_FIRMWARE_INFO_V1_4 *fw_info) init_overdrive_limits_V1_4() argument
1140 init_overdrive_limits_V2_1(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, const ATOM_FIRMWARE_INFO_V2_1 *fw_info) init_overdrive_limits_V2_1() argument
1170 init_overdrive_limits(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_overdrive_limits() argument
1329 init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_clock_voltage_dependency() argument
1556 init_dpm2_parameters(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_dpm2_parameters() argument
1630 init_phase_shedding_table(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_phase_shedding_table() argument
1692 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); get_vce_state_table_entry() local
1723 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table; pp_tables_initialize() local
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H A Dvega12_processpptables.c66 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) in check_powerplay_tables()
68 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()
71 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, in check_powerplay_tables()
193 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) in init_powerplay_table_information()
200 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; in init_powerplay_table_information()
201 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; in init_powerplay_table_information()
209 if (le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]) > VEGA12_ENGINECLOCK_HARDMAX) in init_powerplay_table_information()
213 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]); in init_powerplay_table_information()
215 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]); in init_powerplay_table_information()
219 powerplay_table in init_powerplay_table_information()
64 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) check_powerplay_tables() argument
191 init_powerplay_table_information( struct pp_hwmgr *hwmgr, const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) init_powerplay_table_information() argument
269 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table; vega12_pp_tables_initialize() local
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H A Dvega10_processpptables.c69 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) in check_powerplay_tables()
73 state_arrays = (ATOM_Vega10_State_Array *)(((unsigned long)powerplay_table) + in check_powerplay_tables()
74 le16_to_cpu(powerplay_table->usStateArrayOffset)); in check_powerplay_tables()
76 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()
79 PP_ASSERT_WITH_CODE(powerplay_table->usStateArrayOffset, in check_powerplay_tables()
81 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, in check_powerplay_tables()
121 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) in init_thermal_controller()
130 (((unsigned long)powerplay_table) + in init_thermal_controller()
131 le16_to_cpu(powerplay_table->usThermalControllerOffset)); in init_thermal_controller()
133 PP_ASSERT_WITH_CODE((powerplay_table in init_thermal_controller()
67 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) check_powerplay_tables() argument
119 init_thermal_controller( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) init_thermal_controller() argument
307 init_over_drive_limits( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) init_over_drive_limits() argument
902 init_powerplay_extended_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) init_powerplay_extended_tables() argument
1094 init_dpm_2_parameters( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) init_dpm_2_parameters() argument
1185 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; vega10_pp_tables_initialize() local
1380 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; vega10_baco_set_cap() local
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H A Dprocess_pptables_v1_0.c244 * @param powerplay_table Pointer to the PowerPlay Table.
248 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table in init_dpm_2_parameters()
258 le16_to_cpu(powerplay_table->usUlvVoltageOffset); in init_dpm_2_parameters()
265 le16_to_cpu(powerplay_table->usPowerControlLimit); in init_dpm_2_parameters()
281 if (0 != powerplay_table->usVddcLookupTableOffset) { in init_dpm_2_parameters()
283 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + in init_dpm_2_parameters()
284 le16_to_cpu(powerplay_table->usVddcLookupTableOffset)); in init_dpm_2_parameters()
290 if (0 != powerplay_table->usVddgfxLookupTableOffset) { in init_dpm_2_parameters()
292 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + in init_dpm_2_parameters()
293 le16_to_cpu(powerplay_table in init_dpm_2_parameters()
860 init_over_drive_limits( struct pp_hwmgr *hwmgr, const ATOM_Tonga_POWERPLAYTABLE *powerplay_table) init_over_drive_limits() argument
1063 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table; pp_tables_v1_0_initialize() local
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H A Dvega20_processpptables.c640 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) in check_powerplay_tables()
642 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()
645 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, in check_powerplay_tables()
648 if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) { in check_powerplay_tables()
651 powerplay_table->smcPPTable.Version, in check_powerplay_tables()
656 //dump_pptable(&powerplay_table->smcPPTable); in check_powerplay_tables()
817 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) in init_powerplay_table_information()
825 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; in init_powerplay_table_information()
826 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; in init_powerplay_table_information()
828 hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table in init_powerplay_table_information()
638 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) check_powerplay_tables() argument
815 init_powerplay_table_information( struct pp_hwmgr *hwmgr, const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) init_powerplay_table_information() argument
912 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table; vega20_pp_tables_initialize() local
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H A Dvega10_hwmgr.c3099 ATOM_Vega10_POWERPLAYTABLE *powerplay_table = in vega10_get_pp_table_entry_callback_func() local
3103 (((unsigned long)powerplay_table) + in vega10_get_pp_table_entry_callback_func()
3104 le16_to_cpu(powerplay_table->usSocclkDependencyTableOffset)); in vega10_get_pp_table_entry_callback_func()
3107 (((unsigned long)powerplay_table) + in vega10_get_pp_table_entry_callback_func()
3108 le16_to_cpu(powerplay_table->usGfxclkDependencyTableOffset)); in vega10_get_pp_table_entry_callback_func()
3111 (((unsigned long)powerplay_table) + in vega10_get_pp_table_entry_callback_func()
3112 le16_to_cpu(powerplay_table->usMclkDependencyTableOffset)); in vega10_get_pp_table_entry_callback_func()
H A Dsmu7_hwmgr.c3225 ATOM_Tonga_POWERPLAYTABLE *powerplay_table = in smu7_get_pp_table_entry_callback_func_v1() local
3229 (((unsigned long)powerplay_table) + in smu7_get_pp_table_entry_callback_func_v1()
3230 le16_to_cpu(powerplay_table->usSclkDependencyTableOffset)); in smu7_get_pp_table_entry_callback_func_v1()
3234 (((unsigned long)powerplay_table) + in smu7_get_pp_table_entry_callback_func_v1()
3235 le16_to_cpu(powerplay_table->usMclkDependencyTableOffset)); in smu7_get_pp_table_entry_callback_func_v1()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dprocesspptables.c51 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_table_offset()
55 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_vce_table_offset()
58 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_vce_table_offset()
75 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_info_array_offset()
78 powerplay_table); in get_vce_clock_info_array_offset()
87 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_info_array_size()
90 powerplay_table); in get_vce_clock_info_array_size()
95 (((unsigned long) powerplay_table) + table_offset); in get_vce_clock_info_array_size()
103 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_voltage_limit_table_offset()
106 powerplay_table); in get_vce_clock_voltage_limit_table_offset()
50 get_vce_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_table_offset() argument
74 get_vce_clock_info_array_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_clock_info_array_offset() argument
86 get_vce_clock_info_array_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_clock_info_array_size() argument
102 get_vce_clock_voltage_limit_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_clock_voltage_limit_table_offset() argument
115 get_vce_clock_voltage_limit_table_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_clock_voltage_limit_table_size() argument
130 get_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_state_table_offset() argument
140 get_vce_state_table( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_vce_state_table() argument
152 get_uvd_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_uvd_table_offset() argument
174 get_uvd_clock_info_array_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_uvd_clock_info_array_offset() argument
185 get_uvd_clock_info_array_size(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_uvd_clock_info_array_size() argument
203 get_uvd_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_uvd_clock_voltage_limit_table_offset() argument
217 get_samu_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_samu_table_offset() argument
240 get_samu_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_samu_clock_voltage_limit_table_offset() argument
253 get_acp_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_acp_table_offset() argument
276 get_acp_clock_voltage_limit_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_acp_clock_voltage_limit_table_offset() argument
288 get_cacp_tdp_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_cacp_tdp_table_offset() argument
340 get_sclk_vdd_gfx_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_sclk_vdd_gfx_table_offset() argument
364 get_sclk_vdd_gfx_clock_voltage_dependency_table_offset( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) get_sclk_vdd_gfx_clock_voltage_dependency_table_offset() argument
867 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); pp_tables_get_num_of_entries() local
892 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); pp_tables_get_entry() local
981 init_thermal_controller( struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_thermal_controller() argument
1113 init_overdrive_limits_V1_4(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, const ATOM_FIRMWARE_INFO_V1_4 *fw_info) init_overdrive_limits_V1_4() argument
1136 init_overdrive_limits_V2_1(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, const ATOM_FIRMWARE_INFO_V2_1 *fw_info) init_overdrive_limits_V2_1() argument
1166 init_overdrive_limits(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_overdrive_limits() argument
1313 init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_clock_voltage_dependency() argument
1537 init_dpm2_parameters(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_dpm2_parameters() argument
1611 init_phase_shedding_table(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) init_phase_shedding_table() argument
1669 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); get_vce_state_table_entry() local
1700 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table; pp_tables_initialize() local
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H A Dvega12_processpptables.c65 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) in check_powerplay_tables()
67 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()
70 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, in check_powerplay_tables()
192 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) in init_powerplay_table_information()
198 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; in init_powerplay_table_information()
199 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; in init_powerplay_table_information()
207 if (le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]) > VEGA12_ENGINECLOCK_HARDMAX) in init_powerplay_table_information()
211 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]); in init_powerplay_table_information()
213 le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]); in init_powerplay_table_information()
217 powerplay_table in init_powerplay_table_information()
63 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) check_powerplay_tables() argument
190 init_powerplay_table_information( struct pp_hwmgr *hwmgr, const ATOM_Vega12_POWERPLAYTABLE *powerplay_table) init_powerplay_table_information() argument
264 const ATOM_Vega12_POWERPLAYTABLE *powerplay_table; vega12_pp_tables_initialize() local
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H A Dvega10_processpptables.c68 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) in check_powerplay_tables()
72 state_arrays = (ATOM_Vega10_State_Array *)(((unsigned long)powerplay_table) + in check_powerplay_tables()
73 le16_to_cpu(powerplay_table->usStateArrayOffset)); in check_powerplay_tables()
75 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()
78 PP_ASSERT_WITH_CODE(powerplay_table->usStateArrayOffset, in check_powerplay_tables()
80 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, in check_powerplay_tables()
120 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) in init_thermal_controller()
129 (((unsigned long)powerplay_table) + in init_thermal_controller()
130 le16_to_cpu(powerplay_table->usThermalControllerOffset)); in init_thermal_controller()
132 PP_ASSERT_WITH_CODE((powerplay_table in init_thermal_controller()
66 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) check_powerplay_tables() argument
118 init_thermal_controller( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) init_thermal_controller() argument
306 init_over_drive_limits( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) init_over_drive_limits() argument
871 init_powerplay_extended_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) init_powerplay_extended_tables() argument
1059 init_dpm_2_parameters( struct pp_hwmgr *hwmgr, const ATOM_Vega10_POWERPLAYTABLE *powerplay_table) init_dpm_2_parameters() argument
1150 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; vega10_pp_tables_initialize() local
1345 const ATOM_Vega10_POWERPLAYTABLE *powerplay_table; vega10_baco_set_cap() local
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H A Dprocess_pptables_v1_0.c240 * @powerplay_table: Pointer to the PowerPlay Table.
244 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table in init_dpm_2_parameters()
254 le16_to_cpu(powerplay_table->usUlvVoltageOffset); in init_dpm_2_parameters()
261 le16_to_cpu(powerplay_table->usPowerControlLimit); in init_dpm_2_parameters()
277 if (0 != powerplay_table->usVddcLookupTableOffset) { in init_dpm_2_parameters()
279 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + in init_dpm_2_parameters()
280 le16_to_cpu(powerplay_table->usVddcLookupTableOffset)); in init_dpm_2_parameters()
286 if (0 != powerplay_table->usVddgfxLookupTableOffset) { in init_dpm_2_parameters()
288 (ATOM_Tonga_Voltage_Lookup_Table *)(((unsigned long)powerplay_table) + in init_dpm_2_parameters()
289 le16_to_cpu(powerplay_table in init_dpm_2_parameters()
885 init_over_drive_limits( struct pp_hwmgr *hwmgr, const ATOM_Tonga_POWERPLAYTABLE *powerplay_table) init_over_drive_limits() argument
1144 const ATOM_Tonga_POWERPLAYTABLE *powerplay_table; pp_tables_v1_0_initialize() local
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H A Dvega20_processpptables.c639 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) in check_powerplay_tables()
641 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()
644 PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0, in check_powerplay_tables()
647 if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) { in check_powerplay_tables()
650 powerplay_table->smcPPTable.Version, in check_powerplay_tables()
655 //dump_pptable(&powerplay_table->smcPPTable); in check_powerplay_tables()
816 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) in init_powerplay_table_information()
824 hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType; in init_powerplay_table_information()
825 pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType; in init_powerplay_table_information()
827 hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table in init_powerplay_table_information()
637 check_powerplay_tables( struct pp_hwmgr *hwmgr, const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) check_powerplay_tables() argument
814 init_powerplay_table_information( struct pp_hwmgr *hwmgr, const ATOM_Vega20_POWERPLAYTABLE *powerplay_table) init_powerplay_table_information() argument
911 const ATOM_Vega20_POWERPLAYTABLE *powerplay_table; vega20_pp_tables_initialize() local
[all...]
H A Dvega10_hwmgr.c3124 ATOM_Vega10_POWERPLAYTABLE *powerplay_table = in vega10_get_pp_table_entry_callback_func() local
3128 (((unsigned long)powerplay_table) + in vega10_get_pp_table_entry_callback_func()
3129 le16_to_cpu(powerplay_table->usSocclkDependencyTableOffset)); in vega10_get_pp_table_entry_callback_func()
3132 (((unsigned long)powerplay_table) + in vega10_get_pp_table_entry_callback_func()
3133 le16_to_cpu(powerplay_table->usGfxclkDependencyTableOffset)); in vega10_get_pp_table_entry_callback_func()
3136 (((unsigned long)powerplay_table) + in vega10_get_pp_table_entry_callback_func()
3137 le16_to_cpu(powerplay_table->usMclkDependencyTableOffset)); in vega10_get_pp_table_entry_callback_func()
H A Dsmu7_hwmgr.c3599 ATOM_Tonga_POWERPLAYTABLE *powerplay_table = in smu7_get_pp_table_entry_callback_func_v1() local
3603 (((unsigned long)powerplay_table) + in smu7_get_pp_table_entry_callback_func_v1()
3604 le16_to_cpu(powerplay_table->usSclkDependencyTableOffset)); in smu7_get_pp_table_entry_callback_func_v1()
3608 (((unsigned long)powerplay_table) + in smu7_get_pp_table_entry_callback_func_v1()
3609 le16_to_cpu(powerplay_table->usMclkDependencyTableOffset)); in smu7_get_pp_table_entry_callback_func_v1()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_7_ppt.c329 struct smu_13_0_7_powerplay_table *powerplay_table = in smu_v13_0_7_check_powerplay_table() local
341 if (powerplay_table->platform_caps & SMU_13_0_7_PP_PLATFORM_CAP_HARDWAREDC) in smu_v13_0_7_check_powerplay_table()
344 if (powerplay_table->platform_caps & SMU_13_0_7_PP_PLATFORM_CAP_BACO) { in smu_v13_0_7_check_powerplay_table()
347 if ((powerplay_table->platform_caps & SMU_13_0_7_PP_PLATFORM_CAP_MACO) in smu_v13_0_7_check_powerplay_table()
361 smu->od_settings = &powerplay_table->overdrive_table; in smu_v13_0_7_check_powerplay_table()
367 powerplay_table->thermal_controller_type; in smu_v13_0_7_check_powerplay_table()
375 struct smu_13_0_7_powerplay_table *powerplay_table = in smu_v13_0_7_store_powerplay_table() local
380 powerplay_table->smc_pptable.SkuTable.DebugOverrides |= 0x00000080; in smu_v13_0_7_store_powerplay_table()
382 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in smu_v13_0_7_store_powerplay_table()
1650 struct smu_13_0_7_powerplay_table *powerplay_table in smu_v13_0_7_get_thermal_temperature_range() local
1947 struct smu_13_0_7_powerplay_table *powerplay_table = smu_v13_0_7_get_power_limit() local
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H A Dsmu_v13_0_0_ppt.c340 struct smu_13_0_0_powerplay_table *powerplay_table = in smu_v13_0_0_check_powerplay_table() local
352 if (powerplay_table->platform_caps & SMU_13_0_0_PP_PLATFORM_CAP_HARDWAREDC) in smu_v13_0_0_check_powerplay_table()
355 if (powerplay_table->platform_caps & SMU_13_0_0_PP_PLATFORM_CAP_BACO) { in smu_v13_0_0_check_powerplay_table()
358 if (powerplay_table->platform_caps & SMU_13_0_0_PP_PLATFORM_CAP_MACO) in smu_v13_0_0_check_powerplay_table()
376 smu->od_settings = &powerplay_table->overdrive_table; in smu_v13_0_0_check_powerplay_table()
382 powerplay_table->thermal_controller_type; in smu_v13_0_0_check_powerplay_table()
393 struct smu_13_0_0_powerplay_table *powerplay_table = in smu_v13_0_0_store_powerplay_table() local
396 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in smu_v13_0_0_store_powerplay_table()
1669 struct smu_13_0_0_powerplay_table *powerplay_table = in smu_v13_0_0_get_thermal_temperature_range() local
1693 range->software_shutdown_temp = powerplay_table in smu_v13_0_0_get_thermal_temperature_range()
1993 struct smu_13_0_0_powerplay_table *powerplay_table = smu_v13_0_0_get_power_limit() local
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H A Daldebaran_ppt.c389 struct smu_13_0_powerplay_table *powerplay_table = in aldebaran_check_powerplay_table() local
393 powerplay_table->thermal_controller_type; in aldebaran_check_powerplay_table()
401 struct smu_13_0_powerplay_table *powerplay_table = in aldebaran_store_powerplay_table() local
403 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in aldebaran_store_powerplay_table()
1051 struct smu_13_0_powerplay_table *powerplay_table = in aldebaran_get_thermal_temperature_range() local
1068 range->software_shutdown_temp = powerplay_table->software_shutdown_temp; in aldebaran_get_thermal_temperature_range()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dnavi10_ppt.c344 struct smu_11_0_powerplay_table *powerplay_table = in navi10_check_bxco_support() local
350 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || in navi10_check_bxco_support()
351 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) { in navi10_check_bxco_support()
362 struct smu_11_0_powerplay_table *powerplay_table = in navi10_check_powerplay_table() local
365 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC) in navi10_check_powerplay_table()
371 powerplay_table->thermal_controller_type; in navi10_check_powerplay_table()
377 smu->od_settings = &powerplay_table->overdrive_table; in navi10_check_powerplay_table()
438 struct smu_11_0_powerplay_table *powerplay_table = in navi10_store_powerplay_table() local
441 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in navi10_store_powerplay_table()
1794 struct smu_11_0_powerplay_table *powerplay_table in navi10_get_thermal_temperature_range() local
1846 struct smu_11_0_powerplay_table *powerplay_table = navi10_get_power_limit() local
[all...]
H A Darcturus_ppt.c385 struct smu_11_0_powerplay_table *powerplay_table = in arcturus_check_bxco_support() local
391 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || in arcturus_check_bxco_support()
392 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) { in arcturus_check_bxco_support()
403 struct smu_11_0_powerplay_table *powerplay_table = in arcturus_check_powerplay_table() local
409 powerplay_table->thermal_controller_type; in arcturus_check_powerplay_table()
417 struct smu_11_0_powerplay_table *powerplay_table = in arcturus_store_powerplay_table() local
420 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in arcturus_store_powerplay_table()
974 struct smu_11_0_powerplay_table *powerplay_table = in arcturus_get_thermal_temperature_range() local
995 range->software_shutdown_temp = powerplay_table->software_shutdown_temp; in arcturus_get_thermal_temperature_range()
1160 struct smu_11_0_powerplay_table *powerplay_table in arcturus_get_power_limit() local
[all...]
H A Dsienna_cichlid_ppt.c300 struct smu_11_0_7_powerplay_table *powerplay_table = in sienna_cichlid_check_bxco_support() local
306 if (powerplay_table->platform_caps & SMU_11_0_7_PP_PLATFORM_CAP_BACO || in sienna_cichlid_check_bxco_support()
307 powerplay_table->platform_caps & SMU_11_0_7_PP_PLATFORM_CAP_MACO) { in sienna_cichlid_check_bxco_support()
331 struct smu_11_0_7_powerplay_table *powerplay_table = in sienna_cichlid_check_powerplay_table() local
334 if (powerplay_table->platform_caps & SMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC) in sienna_cichlid_check_powerplay_table()
340 powerplay_table->thermal_controller_type; in sienna_cichlid_check_powerplay_table()
369 struct smu_11_0_7_powerplay_table *powerplay_table = in sienna_cichlid_store_powerplay_table() local
372 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in sienna_cichlid_store_powerplay_table()
1624 struct smu_11_0_7_powerplay_table *powerplay_table = in sienna_cichlid_get_thermal_temperature_range() local
1645 range->software_shutdown_temp = powerplay_table in sienna_cichlid_get_thermal_temperature_range()
1676 struct smu_11_0_7_powerplay_table *powerplay_table = sienna_cichlid_get_power_limit() local
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Darcturus_ppt.c412 struct smu_11_0_powerplay_table *powerplay_table = in arcturus_check_bxco_support() local
418 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || in arcturus_check_bxco_support()
419 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) { in arcturus_check_bxco_support()
443 struct smu_11_0_powerplay_table *powerplay_table = in arcturus_check_powerplay_table() local
450 powerplay_table->thermal_controller_type; in arcturus_check_powerplay_table()
458 struct smu_11_0_powerplay_table *powerplay_table = in arcturus_store_powerplay_table() local
461 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in arcturus_store_powerplay_table()
1076 struct smu_11_0_powerplay_table *powerplay_table = in arcturus_get_thermal_temperature_range() local
1097 range->software_shutdown_temp = powerplay_table->software_shutdown_temp; in arcturus_get_thermal_temperature_range()
1334 struct smu_11_0_powerplay_table *powerplay_table in arcturus_get_power_limit() local
[all...]
H A Dnavi10_ppt.c368 struct smu_11_0_powerplay_table *powerplay_table = in navi10_check_bxco_support() local
374 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_BACO || in navi10_check_bxco_support()
375 powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_MACO) { in navi10_check_bxco_support()
386 struct smu_11_0_powerplay_table *powerplay_table = in navi10_check_powerplay_table() local
389 if (powerplay_table->platform_caps & SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC) in navi10_check_powerplay_table()
395 powerplay_table->thermal_controller_type; in navi10_check_powerplay_table()
401 smu->od_settings = &powerplay_table->overdrive_table; in navi10_check_powerplay_table()
462 struct smu_11_0_powerplay_table *powerplay_table = in navi10_store_powerplay_table() local
465 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in navi10_store_powerplay_table()
2285 struct smu_11_0_powerplay_table *powerplay_table in navi10_get_thermal_temperature_range() local
2340 struct smu_11_0_powerplay_table *powerplay_table = navi10_get_power_limit() local
[all...]
H A Dsienna_cichlid_ppt.c361 struct smu_11_0_7_powerplay_table *powerplay_table = in sienna_cichlid_check_bxco_support() local
367 if (powerplay_table->platform_caps & SMU_11_0_7_PP_PLATFORM_CAP_BACO) { in sienna_cichlid_check_bxco_support()
409 struct smu_11_0_7_powerplay_table *powerplay_table = in sienna_cichlid_check_powerplay_table() local
412 if (powerplay_table->platform_caps & SMU_11_0_7_PP_PLATFORM_CAP_HARDWAREDC) in sienna_cichlid_check_powerplay_table()
419 powerplay_table->thermal_controller_type; in sienna_cichlid_check_powerplay_table()
425 smu->od_settings = &powerplay_table->overdrive_table; in sienna_cichlid_check_powerplay_table()
463 struct smu_11_0_7_powerplay_table *powerplay_table = in sienna_cichlid_store_powerplay_table() local
468 memcpy(table_context->driver_pptable, &powerplay_table->smc_pptable, in sienna_cichlid_store_powerplay_table()
621 struct smu_11_0_7_powerplay_table *powerplay_table = in sienna_cichlid_get_power_limit() local
641 le32_to_cpu(powerplay_table in sienna_cichlid_get_power_limit()
2031 struct smu_11_0_7_powerplay_table *powerplay_table = sienna_cichlid_get_thermal_temperature_range() local
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