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Searched refs:postdiv_reg (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/mmp/
H A Dclk-pll.c25 void __iomem *postdiv_reg; member
66 if (pll->postdiv_reg) { in mmp_clk_pll_recalc_rate()
70 val = readl_relaxed(pll->postdiv_reg); in mmp_clk_pll_recalc_rate()
105 void __iomem *postdiv_reg, u8 postdiv_shift) in mmp_clk_register_pll()
128 pll->postdiv_reg = postdiv_reg; in mmp_clk_register_pll()
100 mmp_clk_register_pll(char *name, unsigned long default_rate, void __iomem *enable_reg, u32 enable, void __iomem *reg, u8 shift, unsigned long input_rate, void __iomem *postdiv_reg, u8 postdiv_shift) mmp_clk_register_pll() argument
/kernel/linux/linux-6.6/drivers/clk/mmp/
H A Dclk-pll.c25 void __iomem *postdiv_reg; member
66 if (pll->postdiv_reg) { in mmp_clk_pll_recalc_rate()
70 val = readl_relaxed(pll->postdiv_reg); in mmp_clk_pll_recalc_rate()
105 void __iomem *postdiv_reg, u8 postdiv_shift) in mmp_clk_register_pll()
128 pll->postdiv_reg = postdiv_reg; in mmp_clk_register_pll()
100 mmp_clk_register_pll(char *name, unsigned long default_rate, void __iomem *enable_reg, u32 enable, void __iomem *reg, u8 shift, unsigned long input_rate, void __iomem *postdiv_reg, u8 postdiv_shift) mmp_clk_register_pll() argument

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