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Searched refs:pmisc_addr (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-6.6/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen4_pfvf.c40 static void adf_gen4_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) in adf_gen4_enable_vf2pf_interrupts() argument
44 val = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_MSK) & ~vf_mask; in adf_gen4_enable_vf2pf_interrupts()
45 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, val); in adf_gen4_enable_vf2pf_interrupts()
48 static void adf_gen4_disable_all_vf2pf_interrupts(void __iomem *pmisc_addr) in adf_gen4_disable_all_vf2pf_interrupts() argument
50 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, ADF_GEN4_VF_MSK); in adf_gen4_disable_all_vf2pf_interrupts()
53 static u32 adf_gen4_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) in adf_gen4_disable_pending_vf2pf_interrupts() argument
58 sources = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_SOU); in adf_gen4_disable_pending_vf2pf_interrupts()
63 disabled = ADF_CSR_RD(pmisc_addr, ADF_4XXX_VM2PF_MSK); in adf_gen4_disable_pending_vf2pf_interrupts()
77 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, ADF_GEN4_VF_MSK); in adf_gen4_disable_pending_vf2pf_interrupts()
78 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MS in adf_gen4_disable_pending_vf2pf_interrupts()
88 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); adf_gen4_pfvf_send() local
115 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); adf_gen4_pfvf_recv() local
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H A Dadf_gen2_pfvf.c54 static void adf_gen2_enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) in adf_gen2_enable_vf2pf_interrupts() argument
58 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in adf_gen2_enable_vf2pf_interrupts()
60 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in adf_gen2_enable_vf2pf_interrupts()
64 static void adf_gen2_disable_all_vf2pf_interrupts(void __iomem *pmisc_addr) in adf_gen2_disable_all_vf2pf_interrupts() argument
67 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in adf_gen2_disable_all_vf2pf_interrupts()
69 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in adf_gen2_disable_all_vf2pf_interrupts()
72 static u32 adf_gen2_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) in adf_gen2_disable_pending_vf2pf_interrupts() argument
78 errsou3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU3); in adf_gen2_disable_pending_vf2pf_interrupts()
85 errmsk3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3); in adf_gen2_disable_pending_vf2pf_interrupts()
101 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK in adf_gen2_disable_pending_vf2pf_interrupts()
179 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); adf_gen2_pfvf_send() local
273 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); adf_gen2_pfvf_recv() local
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H A Dadf_gen2_hw_data.c29 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_gen2_enable_error_correction() local
36 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_AE_CTX_ENABLES(i)); in adf_gen2_enable_error_correction()
38 ADF_CSR_WR(pmisc_addr, ADF_GEN2_AE_CTX_ENABLES(i), val); in adf_gen2_enable_error_correction()
39 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_AE_MISC_CONTROL(i)); in adf_gen2_enable_error_correction()
41 ADF_CSR_WR(pmisc_addr, ADF_GEN2_AE_MISC_CONTROL(i), val); in adf_gen2_enable_error_correction()
46 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_UERRSSMSH(i)); in adf_gen2_enable_error_correction()
48 ADF_CSR_WR(pmisc_addr, ADF_GEN2_UERRSSMSH(i), val); in adf_gen2_enable_error_correction()
49 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_CERRSSMSH(i)); in adf_gen2_enable_error_correction()
51 ADF_CSR_WR(pmisc_addr, ADF_GEN2_CERRSSMSH(i), val); in adf_gen2_enable_error_correction()
59 void __iomem *pmisc_addr in adf_gen2_cfg_iov_thds() local
254 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); adf_gen2_set_ssm_wdtimer() local
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H A Dadf_gen4_hw_data.c114 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_gen4_set_ssm_wdtimer() local
130 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTL_OFFSET, ssm_wdt_low); in adf_gen4_set_ssm_wdtimer()
131 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTH_OFFSET, ssm_wdt_high); in adf_gen4_set_ssm_wdtimer()
133 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEL_OFFSET, ssm_wdt_pke_low); in adf_gen4_set_ssm_wdtimer()
134 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEH_OFFSET, ssm_wdt_pke_high); in adf_gen4_set_ssm_wdtimer()
H A Dadf_isr.c61 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_enable_vf2pf_interrupts() local
65 GET_PFVF_OPS(accel_dev)->enable_vf2pf_interrupts(pmisc_addr, vf_mask); in adf_enable_vf2pf_interrupts()
71 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_disable_all_vf2pf_interrupts() local
75 GET_PFVF_OPS(accel_dev)->disable_all_vf2pf_interrupts(pmisc_addr); in adf_disable_all_vf2pf_interrupts()
81 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_disable_pending_vf2pf_interrupts() local
85 pending = GET_PFVF_OPS(accel_dev)->disable_pending_vf2pf_interrupts(pmisc_addr); in adf_disable_pending_vf2pf_interrupts()
H A Dadf_vf_isr.c33 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_enable_pf2vf_interrupts() local
35 ADF_CSR_WR(pmisc_addr, ADF_VINTMSK_OFFSET, 0x0); in adf_enable_pf2vf_interrupts()
40 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_disable_pf2vf_interrupts() local
42 ADF_CSR_WR(pmisc_addr, ADF_VINTMSK_OFFSET, 0x2); in adf_disable_pf2vf_interrupts()
H A Dadf_accel_devices.h159 void (*enable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask);
160 void (*disable_all_vf2pf_interrupts)(void __iomem *pmisc_addr);
161 u32 (*disable_pending_vf2pf_interrupts)(void __iomem *pmisc_addr);
H A Dqat_hal.c687 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in qat_hal_chip_init() local
719 handle->hal_cap_g_ctl_csr_addr_v = pmisc_addr + ICP_QAT_CAP_OFFSET_4XXX; in qat_hal_chip_init()
720 handle->hal_cap_ae_xfer_csr_addr_v = pmisc_addr + ICP_QAT_AE_OFFSET_4XXX; in qat_hal_chip_init()
721 handle->hal_ep_csr_addr_v = pmisc_addr + ICP_QAT_EP_OFFSET_4XXX; in qat_hal_chip_init()
747 handle->hal_cap_g_ctl_csr_addr_v = pmisc_addr + ICP_QAT_CAP_OFFSET; in qat_hal_chip_init()
748 handle->hal_cap_ae_xfer_csr_addr_v = pmisc_addr + ICP_QAT_AE_OFFSET; in qat_hal_chip_init()
749 handle->hal_ep_csr_addr_v = pmisc_addr + ICP_QAT_EP_OFFSET; in qat_hal_chip_init()
774 handle->hal_cap_g_ctl_csr_addr_v = pmisc_addr + ICP_QAT_CAP_OFFSET; in qat_hal_chip_init()
775 handle->hal_cap_ae_xfer_csr_addr_v = pmisc_addr + ICP_QAT_AE_OFFSET; in qat_hal_chip_init()
776 handle->hal_ep_csr_addr_v = pmisc_addr in qat_hal_chip_init()
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H A Dadf_admin.c386 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_init_admin_comms() local
420 mailbox = pmisc_addr + mailbox_offset; in adf_init_admin_comms()
425 ADF_CSR_WR(pmisc_addr, adminmsg_u, upper_32_bits(reg_val)); in adf_init_admin_comms()
426 ADF_CSR_WR(pmisc_addr, adminmsg_l, lower_32_bits(reg_val)); in adf_init_admin_comms()
/kernel/linux/linux-6.6/drivers/crypto/intel/qat/qat_dh895xcc/
H A Dadf_dh895xcc_hw_data.c123 static void enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) in enable_vf2pf_interrupts() argument
127 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in enable_vf2pf_interrupts()
129 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in enable_vf2pf_interrupts()
134 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) in enable_vf2pf_interrupts()
136 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val); in enable_vf2pf_interrupts()
140 static void disable_all_vf2pf_interrupts(void __iomem *pmisc_addr) in disable_all_vf2pf_interrupts() argument
145 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in disable_all_vf2pf_interrupts()
147 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in disable_all_vf2pf_interrupts()
150 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) in disable_all_vf2pf_interrupts()
152 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK in disable_all_vf2pf_interrupts()
155 disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr) disable_pending_vf2pf_interrupts() argument
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/kernel/linux/linux-5.10/drivers/crypto/qat/qat_common/
H A Dadf_pf2vf_msg.c40 void __iomem *pmisc_addr = pmisc->virt_addr; in adf_enable_vf2pf_interrupts() local
45 reg = ADF_CSR_RD(pmisc_addr, ADF_DH895XCC_ERRMSK3); in adf_enable_vf2pf_interrupts()
47 ADF_CSR_WR(pmisc_addr, ADF_DH895XCC_ERRMSK3, reg); in adf_enable_vf2pf_interrupts()
52 reg = ADF_CSR_RD(pmisc_addr, ADF_DH895XCC_ERRMSK5); in adf_enable_vf2pf_interrupts()
54 ADF_CSR_WR(pmisc_addr, ADF_DH895XCC_ERRMSK5, reg); in adf_enable_vf2pf_interrupts()
63 void __iomem *pmisc_addr = pmisc->virt_addr; in adf_disable_vf2pf_interrupts() local
68 reg = ADF_CSR_RD(pmisc_addr, ADF_DH895XCC_ERRMSK3) | in adf_disable_vf2pf_interrupts()
70 ADF_CSR_WR(pmisc_addr, ADF_DH895XCC_ERRMSK3, reg); in adf_disable_vf2pf_interrupts()
75 reg = ADF_CSR_RD(pmisc_addr, ADF_DH895XCC_ERRMSK5) | in adf_disable_vf2pf_interrupts()
77 ADF_CSR_WR(pmisc_addr, ADF_DH895XCC_ERRMSK in adf_disable_vf2pf_interrupts()
186 void __iomem *pmisc_addr = pmisc->virt_addr; adf_vf2pf_req_hndl() local
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H A Dadf_sriov.c73 void __iomem *pmisc_addr = pmisc->virt_addr; in adf_enable_sriov() local
95 reg = READ_CSR_ME2FUNCTION_MAP_A(pmisc_addr, i); in adf_enable_sriov()
97 WRITE_CSR_ME2FUNCTION_MAP_A(pmisc_addr, i, reg); in adf_enable_sriov()
102 reg = READ_CSR_ME2FUNCTION_MAP_B(pmisc_addr, i); in adf_enable_sriov()
104 WRITE_CSR_ME2FUNCTION_MAP_B(pmisc_addr, i, reg); in adf_enable_sriov()
132 void __iomem *pmisc_addr = pmisc->virt_addr; in adf_disable_sriov() local
150 reg = READ_CSR_ME2FUNCTION_MAP_A(pmisc_addr, i); in adf_disable_sriov()
152 WRITE_CSR_ME2FUNCTION_MAP_A(pmisc_addr, i, reg); in adf_disable_sriov()
157 reg = READ_CSR_ME2FUNCTION_MAP_B(pmisc_addr, i); in adf_disable_sriov()
159 WRITE_CSR_ME2FUNCTION_MAP_B(pmisc_addr, in adf_disable_sriov()
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