Searched refs:pll_out_div (Results 1 - 4 of 4) sorted by relevance
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/phy/ |
H A D | dsi_phy_10nm.c | 65 u8 pll_out_div; member 491 cached->pll_out_div = dsi_phy_read(pll_10nm->phy->pll_base + in dsi_10nm_pll_save_state() 493 cached->pll_out_div &= 0x3; in dsi_10nm_pll_save_state() 503 pll_10nm->phy->id, cached->pll_out_div, cached->bit_clk_div, in dsi_10nm_pll_save_state() 517 val |= cached->pll_out_div; in dsi_10nm_pll_restore_state() 588 struct clk_hw *hw, *pll_out_div, *pll_bit, *pll_by_2_bit; in pll_10nm_register() local 603 pll_out_div = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_10nm_register() 608 if (IS_ERR(pll_out_div)) { in pll_10nm_register() 609 ret = PTR_ERR(pll_out_div); in pll_10nm_register() 617 pll_out_div, CLK_SET_RATE_PAREN in pll_10nm_register() [all...] |
H A D | dsi_phy_7nm.c | 72 u8 pll_out_div; member 540 cached->pll_out_div = dsi_phy_read(pll_7nm->phy->pll_base + in dsi_7nm_pll_save_state() 542 cached->pll_out_div &= 0x3; in dsi_7nm_pll_save_state() 552 pll_7nm->phy->id, cached->pll_out_div, cached->bit_clk_div, in dsi_7nm_pll_save_state() 566 val |= cached->pll_out_div; in dsi_7nm_pll_restore_state() 637 struct clk_hw *hw, *pll_out_div, *pll_bit, *pll_by_2_bit; in pll_7nm_register() local 652 pll_out_div = devm_clk_hw_register_divider_parent_hw(dev, clk_name, in pll_7nm_register() 657 if (IS_ERR(pll_out_div)) { in pll_7nm_register() 658 ret = PTR_ERR(pll_out_div); in pll_7nm_register() 666 pll_out_div, CLK_SET_RATE_PAREN in pll_7nm_register() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/ |
H A D | dsi_pll_10nm.c | 83 u8 pll_out_div; member 540 cached->pll_out_div = pll_read(pll_10nm->mmio + in dsi_pll_10nm_save_state() 542 cached->pll_out_div &= 0x3; in dsi_pll_10nm_save_state() 552 pll_10nm->id, cached->pll_out_div, cached->bit_clk_div, in dsi_pll_10nm_save_state() 566 val |= cached->pll_out_div; in dsi_pll_10nm_restore_state()
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H A D | dsi_pll_7nm.c | 83 u8 pll_out_div; member 566 cached->pll_out_div = pll_read(pll_7nm->mmio + in dsi_pll_7nm_save_state() 568 cached->pll_out_div &= 0x3; in dsi_pll_7nm_save_state() 578 pll_7nm->id, cached->pll_out_div, cached->bit_clk_div, in dsi_pll_7nm_save_state() 592 val |= cached->pll_out_div; in dsi_pll_7nm_restore_state()
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