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Searched refs:plane_id (Results 1 - 25 of 57) sorted by relevance

123

/kernel/linux/linux-6.6/drivers/gpu/drm/kmb/
H A Dkmb_plane.c72 int plane_id = kmb_plane->id; in check_pixel_format() local
76 init_disp_cfg = kmb->init_disp_cfg[plane_id]; in check_pixel_format()
98 int plane_id = kmb_plane->id; in kmb_plane_atomic_check() local
106 init_disp_cfg = kmb->init_disp_cfg[plane_id]; in kmb_plane_atomic_check()
145 int plane_id = kmb_plane->id; in kmb_plane_atomic_disable() local
150 if (WARN_ON(plane_id >= KMB_MAX_PLANES)) in kmb_plane_atomic_disable()
153 switch (plane_id) { in kmb_plane_atomic_disable()
155 kmb->plane_status[plane_id].ctrl = LCD_CTRL_VL1_ENABLE; in kmb_plane_atomic_disable()
158 kmb->plane_status[plane_id].ctrl = LCD_CTRL_VL2_ENABLE; in kmb_plane_atomic_disable()
162 kmb->plane_status[plane_id] in kmb_plane_atomic_disable()
286 config_csc(struct kmb_drm_private *kmb, int plane_id) config_csc() argument
303 kmb_plane_set_alpha(struct kmb_drm_private *kmb, const struct drm_plane_state *state, unsigned char plane_id, unsigned int *val) kmb_plane_set_alpha() argument
357 unsigned char plane_id; kmb_plane_atomic_update() local
[all...]
H A Dkmb_drv.c206 int plane_id, dma0_state, dma1_state; in handle_lcd_irq() local
222 for (plane_id = LAYER_0; in handle_lcd_irq()
223 plane_id < KMB_MAX_PLANES; plane_id++) { in handle_lcd_irq()
224 if (kmb->plane_status[plane_id].disable) { in handle_lcd_irq()
227 (plane_id), in handle_lcd_irq()
231 kmb->plane_status[plane_id].ctrl); in handle_lcd_irq()
246 kmb->plane_status[plane_id].disable = false; in handle_lcd_irq()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dskl_universal_plane.c244 enum plane_id plane_id) in icl_is_nv12_y_plane()
247 icl_nv12_y_plane_mask(dev_priv) & BIT(plane_id); in icl_is_nv12_y_plane()
255 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id) in icl_is_hdr_plane() argument
258 icl_hdr_plane_mask() & BIT(plane_id); in icl_is_hdr_plane()
520 enum plane_id plane_id = plane->id; in icl_program_input_csc() local
562 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0), in icl_program_input_csc()
564 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, in icl_program_input_csc()
243 icl_is_nv12_y_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id) icl_is_nv12_y_plane() argument
622 enum plane_id plane_id = plane->id; skl_plane_disable_arm() local
636 enum plane_id plane_id = plane->id; icl_plane_disable_arm() local
655 enum plane_id plane_id = plane->id; skl_plane_get_hw_state() local
1082 enum plane_id plane_id = plane->id; icl_plane_csc_load_black() local
1118 enum plane_id plane_id = plane->id; skl_plane_update_noarm() local
1148 enum plane_id plane_id = plane->id; skl_plane_update_arm() local
1204 enum plane_id plane_id = plane->id; icl_plane_update_noarm() local
1279 enum plane_id plane_id = plane->id; icl_plane_update_arm() local
1316 enum plane_id plane_id = plane->id; skl_plane_async_flip() local
1944 skl_plane_has_fbc(struct drm_i915_private *dev_priv, enum intel_fbc_id fbc_id, enum plane_id plane_id) skl_plane_has_fbc() argument
1953 skl_plane_fbc(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id) skl_plane_fbc() argument
1964 skl_plane_has_planar(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id) skl_plane_has_planar() argument
1980 skl_get_plane_formats(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id, int *num_formats) skl_get_plane_formats() argument
1993 glk_get_plane_formats(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id, int *num_formats) glk_get_plane_formats() argument
2006 icl_get_plane_formats(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id, int *num_formats) icl_get_plane_formats() argument
2168 skl_plane_has_rc_ccs(struct drm_i915_private *i915, enum pipe pipe, enum plane_id plane_id) skl_plane_has_rc_ccs() argument
2191 gen12_plane_has_mc_ccs(struct drm_i915_private *i915, enum plane_id plane_id) gen12_plane_has_mc_ccs() argument
2213 skl_get_plane_caps(struct drm_i915_private *i915, enum pipe pipe, enum plane_id plane_id) skl_get_plane_caps() argument
2238 skl_universal_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id) skl_universal_plane_create() argument
2395 enum plane_id plane_id = plane->id; skl_get_initial_plane_config() local
[all...]
H A Dskl_universal_plane.h17 enum plane_id;
21 enum pipe pipe, enum plane_id plane_id);
32 enum plane_id plane_id);
34 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
H A Dskl_watermark.c342 enum plane_id plane_id; in skl_crtc_can_enable_sagv() local
354 for_each_plane_id_on_crtc(crtc, plane_id) { in skl_crtc_can_enable_sagv()
356 &crtc_state->wm.skl.optimal.planes[plane_id]; in skl_crtc_can_enable_sagv()
376 for_each_plane_id_on_crtc(crtc, plane_id) { in skl_crtc_can_enable_sagv()
378 &crtc_state->wm.skl.optimal.planes[plane_id]; in skl_crtc_can_enable_sagv()
394 enum plane_id plane_id; in tgl_crtc_can_enable_sagv() local
399 for_each_plane_id_on_crtc(crtc, plane_id) { in tgl_crtc_can_enable_sagv()
401 &crtc_state->wm.skl.optimal.planes[plane_id]; in tgl_crtc_can_enable_sagv()
775 skl_ddb_get_hw_plane_state(struct drm_i915_private *i915, const enum pipe pipe, const enum plane_id plane_id, struct skl_ddb_entry *ddb, struct skl_ddb_entry *ddb_y) skl_ddb_get_hw_plane_state() argument
808 enum plane_id plane_id; skl_pipe_ddb_get_hw_state() local
1366 enum plane_id plane_id; skl_total_relative_data_rate() local
1383 skl_plane_wm_level(const struct skl_pipe_wm *pipe_wm, enum plane_id plane_id, int level) skl_plane_wm_level() argument
1396 skl_plane_trans_wm(const struct skl_pipe_wm *pipe_wm, enum plane_id plane_id) skl_plane_trans_wm() argument
1499 enum plane_id plane_id; skl_crtc_allocate_plane_ddb() local
2141 enum plane_id plane_id = plane->id; skl_build_plane_wm() local
2171 enum plane_id plane_id = plane->id; icl_build_plane_wm() local
2225 enum plane_id plane_id; skl_max_wm0_lines() local
2286 enum plane_id plane_id; skl_wm_check_vblank() local
2305 enum plane_id plane_id; skl_wm_check_vblank() local
2383 enum plane_id plane_id = plane->id; skl_write_plane_wm() local
2420 enum plane_id plane_id = plane->id; skl_write_cursor_wm() local
2520 enum plane_id plane_id = plane->id; skl_ddb_add_affected_planes() local
2693 enum plane_id plane_id = plane->id; skl_print_wm_changes() local
2710 enum plane_id plane_id = plane->id; skl_print_wm_changes() local
2871 enum plane_id plane_id = plane->id; skl_wm_add_affected_planes() local
2949 enum plane_id plane_id; skl_pipe_wm_get_hw_state() local
3007 enum plane_id plane_id; skl_wm_get_hw_state() local
[all...]
H A Di9xx_wm.c831 static int g4x_plane_fifo_size(enum plane_id plane_id, int level) in g4x_plane_fifo_size() argument
847 switch (plane_id) { in g4x_plane_fifo_size()
855 MISSING_CASE(plane_id); in g4x_plane_fifo_size()
930 int level, enum plane_id plane_id, u16 value) in g4x_raw_plane_wm_set()
938 dirty |= raw->plane[plane_id] != value; in g4x_raw_plane_wm_set()
939 raw->plane[plane_id] = value; in g4x_raw_plane_wm_set()
973 enum plane_id plane_id in g4x_raw_plane_wm_compute() local
929 g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state, int level, enum plane_id plane_id, u16 value) g4x_raw_plane_wm_set() argument
1041 g4x_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state, enum plane_id plane_id, int level) g4x_raw_plane_wm_is_valid() argument
1067 enum plane_id plane_id; g4x_invalidate_wms() local
1111 enum plane_id plane_id; _g4x_compute_pipe_wm() local
1204 enum plane_id plane_id; g4x_compute_intermediate_wm() local
1456 enum plane_id plane_id; vlv_compute_fifo() local
1533 enum plane_id plane_id; vlv_invalidate_wms() local
1555 vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state, int level, enum plane_id plane_id, u16 value) vlv_raw_plane_wm_set() argument
1576 enum plane_id plane_id = plane->id; vlv_raw_plane_wm_compute() local
1612 vlv_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state, enum plane_id plane_id, int level) vlv_raw_plane_wm_is_valid() argument
1640 enum plane_id plane_id; _vlv_compute_pipe_wm() local
1874 enum plane_id plane_id; vlv_compute_intermediate_wm() local
3628 enum plane_id plane_id; g4x_wm_get_hw_state() local
3720 enum plane_id plane_id = plane->id; g4x_wm_sanitize() local
3814 enum plane_id plane_id; vlv_wm_get_hw_state() local
3875 enum plane_id plane_id = plane->id; vlv_wm_sanitize() local
[all...]
H A Dintel_sprite.c66 enum plane_id plane_id = plane->id; in chv_sprite_update_csc() local
97 intel_de_write_fw(dev_priv, SPCSCYGOFF(plane_id), in chv_sprite_update_csc()
99 intel_de_write_fw(dev_priv, SPCSCCBOFF(plane_id), in chv_sprite_update_csc()
101 intel_de_write_fw(dev_priv, SPCSCCROFF(plane_id), in chv_sprite_update_csc()
104 intel_de_write_fw(dev_priv, SPCSCC01(plane_id), in chv_sprite_update_csc()
106 intel_de_write_fw(dev_priv, SPCSCC23(plane_id), in chv_sprite_update_csc()
108 intel_de_write_fw(dev_priv, SPCSCC45(plane_id), in chv_sprite_update_csc()
110 intel_de_write_fw(dev_priv, SPCSCC67(plane_id), in chv_sprite_update_csc()
112 intel_de_write_fw(dev_priv, SPCSCC8(plane_id), SPCSC_C in chv_sprite_update_csc()
139 enum plane_id plane_id = plane->id; vlv_sprite_update_clrc() local
342 enum plane_id plane_id = plane->id; vlv_sprite_update_gamma() local
366 enum plane_id plane_id = plane->id; vlv_sprite_update_noarm() local
387 enum plane_id plane_id = plane->id; vlv_sprite_update_arm() local
435 enum plane_id plane_id = plane->id; vlv_sprite_disable_arm() local
447 enum plane_id plane_id = plane->id; vlv_sprite_get_hw_state() local
[all...]
H A Dintel_bw.c696 enum plane_id plane_id; in intel_bw_crtc_data_rate() local
698 for_each_plane_id_on_crtc(crtc, plane_id) { in intel_bw_crtc_data_rate()
703 if (plane_id == PLANE_CURSOR) in intel_bw_crtc_data_rate()
706 data_rate += crtc_state->data_rate[plane_id]; in intel_bw_crtc_data_rate()
709 data_rate += crtc_state->data_rate_y[plane_id]; in intel_bw_crtc_data_rate()
1038 enum plane_id plane_id, in skl_plane_calc_dbuf_bw()
1053 crtc_bw->active_planes[slice] |= BIT(plane_id); in skl_plane_calc_dbuf_bw()
1063 enum plane_id plane_i in skl_crtc_calc_dbuf_bw() local
1036 skl_plane_calc_dbuf_bw(struct intel_bw_state *bw_state, struct intel_crtc *crtc, enum plane_id plane_id, const struct skl_ddb_entry *ddb, unsigned int data_rate) skl_plane_calc_dbuf_bw() argument
[all...]
H A Dintel_dpt.c327 enum plane_id plane_id; in intel_dpt_configure() local
329 for_each_plane_id_on_crtc(crtc, plane_id) { in intel_dpt_configure()
330 if (plane_id == PLANE_CURSOR) in intel_dpt_configure()
333 intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id), in intel_dpt_configure()
H A Dintel_atomic_plane.c667 intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id) in intel_crtc_get_plane() argument
673 if (plane->id == plane_id) in intel_crtc_get_plane()
738 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit() local
741 !(*update_mask & BIT(plane_id))) in skl_next_plane_to_commit()
744 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb[plane_id], in skl_next_plane_to_commit()
745 ddb, I915_MAX_PLANES, plane_id) || in skl_next_plane_to_commit()
746 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_next_plane_to_commit()
747 ddb_y, I915_MAX_PLANES, plane_id)) in skl_next_plane_to_commit()
[all...]
H A Dintel_frontbuffer.h60 #define INTEL_FRONTBUFFER(pipe, plane_id) \
61 BIT((plane_id) + INTEL_FRONTBUFFER_BITS_PER_PIPE * (pipe));
H A Dintel_display_limits.h62 enum plane_id { enum
H A Dintel_atomic_plane.h19 enum plane_id;
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_sprite.c346 enum plane_id plane_id) in icl_is_nv12_y_plane()
349 icl_nv12_y_plane_mask(dev_priv) & BIT(plane_id); in icl_is_nv12_y_plane()
352 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id) in icl_is_hdr_plane() argument
355 icl_hdr_plane_mask() & BIT(plane_id); in icl_is_hdr_plane()
492 enum plane_id plane_id = plane->id; in icl_program_input_csc() local
534 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, 0), in icl_program_input_csc()
536 intel_de_write_fw(dev_priv, PLANE_INPUT_CSC_COEFF(pipe, plane_id, in icl_program_input_csc()
345 icl_is_nv12_y_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id) icl_is_nv12_y_plane() argument
568 enum plane_id plane_id = plane->id; skl_program_plane() local
681 enum plane_id plane_id = plane->id; skl_disable_plane() local
704 enum plane_id plane_id = plane->id; skl_plane_get_hw_state() local
738 enum plane_id plane_id = plane->id; chv_update_csc() local
811 enum plane_id plane_id = plane->id; vlv_update_clrc() local
1014 enum plane_id plane_id = plane->id; vlv_update_gamma() local
1038 enum plane_id plane_id = plane->id; vlv_update_plane() local
1105 enum plane_id plane_id = plane->id; vlv_disable_plane() local
1122 enum plane_id plane_id = plane->id; vlv_plane_get_hw_state() local
2797 gen12_plane_supports_mc_ccs(struct drm_i915_private *dev_priv, enum plane_id plane_id) gen12_plane_supports_mc_ccs() argument
2919 skl_plane_has_fbc(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id) skl_plane_has_fbc() argument
2928 skl_plane_has_planar(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id) skl_plane_has_planar() argument
2944 skl_get_plane_formats(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id, int *num_formats) skl_get_plane_formats() argument
2957 glk_get_plane_formats(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id, int *num_formats) glk_get_plane_formats() argument
2970 icl_get_plane_formats(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id, int *num_formats) icl_get_plane_formats() argument
2986 gen12_get_plane_modifiers(struct drm_i915_private *dev_priv, enum plane_id plane_id) gen12_get_plane_modifiers() argument
2995 skl_plane_has_ccs(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id) skl_plane_has_ccs() argument
3013 skl_universal_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe, enum plane_id plane_id) skl_universal_plane_create() argument
[all...]
H A Dintel_sprite.h33 enum pipe pipe, enum plane_id plane_id);
42 enum plane_id plane_id);
43 bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
H A Dintel_atomic_plane.c377 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit() local
380 !(*update_mask & BIT(plane_id))) in skl_next_plane_to_commit()
383 if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id], in skl_next_plane_to_commit()
385 I915_MAX_PLANES, plane_id) || in skl_next_plane_to_commit()
386 skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id], in skl_next_plane_to_commit()
388 I915_MAX_PLANES, plane_id)) in skl_next_plane_to_commit()
391 *update_mask &= ~BIT(plane_id); in skl_next_plane_to_commit()
392 entries_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id]; in skl_next_plane_to_commit()
[all...]
H A Dintel_bw.c275 enum plane_id plane_id; in intel_bw_crtc_data_rate() local
277 for_each_plane_id_on_crtc(crtc, plane_id) { in intel_bw_crtc_data_rate()
282 if (plane_id == PLANE_CURSOR) in intel_bw_crtc_data_rate()
285 data_rate += crtc_state->data_rate[plane_id]; in intel_bw_crtc_data_rate()
380 enum plane_id plane_id; in skl_bw_calc_min_cdclk() local
396 for_each_plane_id_on_crtc(crtc, plane_id) { in skl_bw_calc_min_cdclk()
398 &crtc_state->wm.skl.plane_ddb_y[plane_id]; in skl_bw_calc_min_cdclk()
400 &crtc_state->wm.skl.plane_ddb_uv[plane_id]; in skl_bw_calc_min_cdclk()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Dintel_pm.c1090 static int g4x_plane_fifo_size(enum plane_id plane_id, int level) in g4x_plane_fifo_size() argument
1106 switch (plane_id) { in g4x_plane_fifo_size()
1114 MISSING_CASE(plane_id); in g4x_plane_fifo_size()
1194 int level, enum plane_id plane_id, u16 value) in g4x_raw_plane_wm_set()
1202 dirty |= raw->plane[plane_id] != value; in g4x_raw_plane_wm_set()
1203 raw->plane[plane_id] = value; in g4x_raw_plane_wm_set()
1238 enum plane_id plane_id in g4x_raw_plane_wm_compute() local
1193 g4x_raw_plane_wm_set(struct intel_crtc_state *crtc_state, int level, enum plane_id plane_id, u16 value) g4x_raw_plane_wm_set() argument
1306 g4x_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state, enum plane_id plane_id, int level) g4x_raw_plane_wm_is_valid() argument
1332 enum plane_id plane_id; g4x_invalidate_wms() local
1382 enum plane_id plane_id; g4x_compute_pipe_wm() local
1462 enum plane_id plane_id; g4x_compute_intermediate_wm() local
1713 enum plane_id plane_id; vlv_compute_fifo() local
1790 enum plane_id plane_id; vlv_invalidate_wms() local
1812 vlv_raw_plane_wm_set(struct intel_crtc_state *crtc_state, int level, enum plane_id plane_id, u16 value) vlv_raw_plane_wm_set() argument
1834 enum plane_id plane_id = plane->id; vlv_raw_plane_wm_compute() local
1871 vlv_raw_plane_wm_is_valid(const struct intel_crtc_state *crtc_state, enum plane_id plane_id, int level) vlv_raw_plane_wm_is_valid() argument
1905 enum plane_id plane_id; vlv_compute_pipe_wm() local
2119 enum plane_id plane_id; vlv_compute_intermediate_wm() local
3924 enum plane_id plane_id; tgl_crtc_can_enable_sagv() local
4299 skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv, const enum pipe pipe, const enum plane_id plane_id, struct skl_ddb_entry *ddb_y, struct skl_ddb_entry *ddb_uv) skl_ddb_get_hw_plane_state() argument
4347 enum plane_id plane_id; skl_pipe_ddb_get_hw_state() local
4717 enum plane_id plane_id = plane->id; skl_get_total_relative_data_rate() local
4744 enum plane_id plane_id = plane->id; icl_get_total_relative_data_rate() local
4780 skl_plane_wm_level(const struct intel_crtc_state *crtc_state, enum plane_id plane_id, int level) skl_plane_wm_level() argument
4803 enum plane_id plane_id; skl_allocate_pipe_ddb() local
5479 skl_build_plane_wm_single(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state, enum plane_id plane_id, int color_plane) skl_build_plane_wm_single() argument
5504 skl_build_plane_wm_uv(struct intel_crtc_state *crtc_state, const struct intel_plane_state *plane_state, enum plane_id plane_id) skl_build_plane_wm_uv() argument
5530 enum plane_id plane_id = plane->id; skl_build_plane_wm() local
5555 enum plane_id plane_id = to_intel_plane(plane_state->uapi.plane)->id; icl_build_plane_wm() local
5650 enum plane_id plane_id = plane->id; skl_write_plane_wm() local
5690 enum plane_id plane_id = plane->id; skl_write_cursor_wm() local
5770 enum plane_id plane_id = plane->id; skl_ddb_add_affected_planes() local
5851 enum plane_id plane_id = plane->id; skl_print_wm_changes() local
5868 enum plane_id plane_id = plane->id; skl_print_wm_changes() local
6068 enum plane_id plane_id = plane->id; skl_wm_add_affected_planes() local
6237 enum plane_id plane_id; skl_pipe_wm_get_hw_state() local
6456 enum plane_id plane_id; g4x_wm_get_hw_state() local
6543 enum plane_id plane_id = plane->id; g4x_wm_sanitize() local
6637 enum plane_id plane_id; vlv_wm_get_hw_state() local
6701 enum plane_id plane_id = plane->id; vlv_wm_sanitize() local
[all...]
H A Di915_reg.h6829 #define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \
6830 _PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
6831 #define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \
6832 _MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))
6834 #define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR)
6835 #define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOFF, _SPBLINOFF)
6836 #define SPSTRIDE(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPASTRID
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/sti/
H A Dsti_mixer.c239 int plane_id, depth = plane->drm_plane.state->normalized_zpos; in sti_mixer_set_plane_depth() local
245 plane_id = GAM_DEPTH_GDP0_ID; in sti_mixer_set_plane_depth()
248 plane_id = GAM_DEPTH_GDP1_ID; in sti_mixer_set_plane_depth()
251 plane_id = GAM_DEPTH_GDP2_ID; in sti_mixer_set_plane_depth()
254 plane_id = GAM_DEPTH_GDP3_ID; in sti_mixer_set_plane_depth()
257 plane_id = GAM_DEPTH_VID0_ID; in sti_mixer_set_plane_depth()
271 if ((val & mask) == plane_id << (3 * i)) in sti_mixer_set_plane_depth()
276 plane_id = plane_id << (3 * depth); in sti_mixer_set_plane_depth()
281 plane_id, mas in sti_mixer_set_plane_depth()
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/kernel/linux/linux-6.6/drivers/gpu/drm/sti/
H A Dsti_mixer.c239 int plane_id, depth = plane->drm_plane.state->normalized_zpos; in sti_mixer_set_plane_depth() local
245 plane_id = GAM_DEPTH_GDP0_ID; in sti_mixer_set_plane_depth()
248 plane_id = GAM_DEPTH_GDP1_ID; in sti_mixer_set_plane_depth()
251 plane_id = GAM_DEPTH_GDP2_ID; in sti_mixer_set_plane_depth()
254 plane_id = GAM_DEPTH_GDP3_ID; in sti_mixer_set_plane_depth()
257 plane_id = GAM_DEPTH_VID0_ID; in sti_mixer_set_plane_depth()
271 if ((val & mask) == plane_id << (3 * i)) in sti_mixer_set_plane_depth()
276 plane_id = plane_id << (3 * depth); in sti_mixer_set_plane_depth()
281 plane_id, mas in sti_mixer_set_plane_depth()
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A Di915_reg.h2693 #define PIPE_MISC2_FLIP_INFO_PLANE_SEL(plane_id) REG_FIELD_PREP(PIPE_MISC2_FLIP_INFO_PLANE_SEL_MASK, (plane_id))
3524 #define _VLV_SPR(pipe, plane_id, reg_a, reg_b) \
3525 _PIPE((pipe) * 2 + (plane_id) - PLANE_SPRITE0, (reg_a), (reg_b))
3526 #define _MMIO_VLV_SPR(pipe, plane_id, reg_a, reg_b) \
3527 _MMIO(_VLV_SPR((pipe), (plane_id), (reg_a), (reg_b)))
3529 #define SPCNTR(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPACNTR, _SPBCNTR)
3530 #define SPLINOFF(pipe, plane_id) _MMIO_VLV_SPR((pipe), (plane_id), _SPALINOF
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/
H A Ddmabuf.c256 int plane_id) in vgpu_get_plane_info()
264 if (plane_id == DRM_PLANE_TYPE_PRIMARY) { in vgpu_get_plane_info()
294 } else if (plane_id == DRM_PLANE_TYPE_CURSOR) { in vgpu_get_plane_info()
316 gvt_vgpu_err("invalid plane id:%d\n", plane_id); in vgpu_get_plane_info()
253 vgpu_get_plane_info(struct drm_device *dev, struct intel_vgpu *vgpu, struct intel_vgpu_fb_info *info, int plane_id) vgpu_get_plane_info() argument
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
H A Ddmabuf.c267 int plane_id) in vgpu_get_plane_info()
275 if (plane_id == DRM_PLANE_TYPE_PRIMARY) { in vgpu_get_plane_info()
305 } else if (plane_id == DRM_PLANE_TYPE_CURSOR) { in vgpu_get_plane_info()
327 gvt_vgpu_err("invalid plane id:%d\n", plane_id); in vgpu_get_plane_info()
264 vgpu_get_plane_info(struct drm_device *dev, struct intel_vgpu *vgpu, struct intel_vgpu_fb_info *info, int plane_id) vgpu_get_plane_info() argument
/kernel/linux/linux-6.6/drivers/media/platform/nvidia/tegra-vde/
H A Dh264.c679 unsigned int plane_id, in tegra_vde_validate_vb_size()
682 u64 offset = vb->planes[plane_id].data_offset; in tegra_vde_validate_vb_size()
685 if (offset + min_size > vb2_plane_size(vb, plane_id)) { in tegra_vde_validate_vb_size()
687 plane_id, vb2_plane_size(vb, plane_id), offset, min_size); in tegra_vde_validate_vb_size()
677 tegra_vde_validate_vb_size(struct tegra_ctx *ctx, struct vb2_buffer *vb, unsigned int plane_id, size_t min_size) tegra_vde_validate_vb_size() argument

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