| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 989 display_e2e_pipe_params_st *pipes) in dcn20_populate_dml_writeback_from_context()
1002 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1003 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1004 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1005 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1006 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1007 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1008 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1009 pipes[pipe_cnt].dout.wb.wb_vtaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1010 pipes[pipe_cn in dcn20_populate_dml_writeback_from_context()
987 dcn20_populate_dml_writeback_from_context(struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) dcn20_populate_dml_writeback_from_context() argument
1027 dcn20_fpu_set_wb_arb_params(struct mcif_arb_params *wb_arb_params, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int i) dcn20_fpu_set_wb_arb_params() argument
1134 dcn20_calculate_dlg_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn20_calculate_dlg_params() argument
1308 dcn20_populate_dml_pipes_from_context(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) dcn20_populate_dml_pipes_from_context() argument
1722 dcn20_calculate_wm(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *out_pipe_cnt, int *pipe_split_from, int vlevel, bool fast_validate) dcn20_calculate_wm() argument
2030 display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_ATOMIC); dcn20_validate_bandwidth_internal() local
2149 dcn21_populate_dml_pipes_from_context(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) dcn21_populate_dml_pipes_from_context() argument
2200 calculate_wm_set_for_vlevel(int vlevel, struct wm_range_table_entry *table_entry, struct dcn_watermarks *wm_set, struct display_mode_lib *dml, display_e2e_pipe_params_st *pipes, int pipe_cnt) calculate_wm_set_for_vlevel() argument
2230 dcn21_calculate_wm(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *out_pipe_cnt, int *pipe_split_from, int vlevel_req, bool fast_validate) dcn21_calculate_wm() argument
2325 display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_ATOMIC); dcn21_validate_bandwidth_fp() local
2472 dcn201_populate_dml_writeback_from_context_fpu(struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) dcn201_populate_dml_writeback_from_context_fpu() argument
[all...] |
| H A D | dcn20_fpu.h | 33 display_e2e_pipe_params_st *pipes);
37 display_e2e_pipe_params_st *pipes,
41 display_e2e_pipe_params_st *pipes,
46 display_e2e_pipe_params_st *pipes,
50 display_e2e_pipe_params_st *pipes,
78 display_e2e_pipe_params_st *pipes,
89 display_e2e_pipe_params_st *pipes);
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_resource.c | 1679 /* Always do 1-to-1 mapping when number of DSCs is same as number of pipes */ in dcn20_acquire_dsc()
1737 /* The number of DSCs can be less than the number of pipes */ in dcn20_add_dsc_to_stream_resource()
1970 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn20_populate_dml_writeback_from_context()
1981 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1982 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1983 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1984 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1985 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1986 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1987 pipes[pipe_cn in dcn20_populate_dml_writeback_from_context()
1969 dcn20_populate_dml_writeback_from_context( struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) dcn20_populate_dml_writeback_from_context() argument
2006 dcn20_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes) global() argument
2424 dcn20_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) global() argument
2838 dcn20_fast_validate_bw( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *pipe_split_from, int *vlevel_out) global() argument
2955 dcn20_calculate_wm( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *out_pipe_cnt, int *pipe_split_from, int vlevel) global() argument
3070 dcn20_calculate_dlg_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) global() argument
3148 display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_ATOMIC); global() local
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 296 display_e2e_pipe_params_st *pipes, in calculate_wm_set_for_vlevel()
303 pipes[0].clks_cfg.voltage = vlevel; in calculate_wm_set_for_vlevel()
304 pipes[0].clks_cfg.dcfclk_mhz = dml->soc.clock_limits[vlevel].dcfclk_mhz; in calculate_wm_set_for_vlevel()
305 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel()
311 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
312 wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
313 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
314 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
315 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
316 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cn in calculate_wm_set_for_vlevel()
292 calculate_wm_set_for_vlevel(int vlevel, struct wm_range_table_entry *table_entry, struct dcn_watermarks *wm_set, struct display_mode_lib *dml, display_e2e_pipe_params_st *pipes, int pipe_cnt) calculate_wm_set_for_vlevel() argument
412 dcn301_calculate_wm_and_dlg_fp(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel_req) dcn301_calculate_wm_and_dlg_fp() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_link_hwss.c | 102 struct pipe_ctx *pipes = in dp_enable_link_phy() local
118 if (pipes[i].stream != NULL && in dp_enable_link_phy()
119 pipes[i].stream->link == link) { in dp_enable_link_phy()
120 if (pipes[i].clock_source != NULL && in dp_enable_link_phy()
121 pipes[i].clock_source->id != CLOCK_SOURCE_ID_DP_DTO) { in dp_enable_link_phy()
122 pipes[i].clock_source = dp_cs; in dp_enable_link_phy()
123 pipes[i].stream_res.pix_clk_params.requested_pix_clk_100hz = in dp_enable_link_phy()
124 pipes[i].stream->timing.pix_clk_100hz; in dp_enable_link_phy()
125 pipes[i].clock_source->funcs->program_pix_clk( in dp_enable_link_phy()
126 pipes[ in dp_enable_link_phy()
330 struct pipe_ctx *pipes = dp_retrain_link_dp_test() local
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 258 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn30_fpu_populate_dml_writeback_from_context()
275 pipes[pipe_cnt].dout.wb_enable = 0; in dcn30_fpu_populate_dml_writeback_from_context()
276 pipes[pipe_cnt].dout.num_active_wb = 0; in dcn30_fpu_populate_dml_writeback_from_context()
282 pipes[pipe_cnt].dout.wb_enable = 1; in dcn30_fpu_populate_dml_writeback_from_context()
283 pipes[pipe_cnt].dout.num_active_wb++; in dcn30_fpu_populate_dml_writeback_from_context()
326 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz, in dcn30_fpu_populate_dml_writeback_from_context()
333 pipes[pipe_cnt].pipe.dest.htotal, in dcn30_fpu_populate_dml_writeback_from_context()
338 pipes[pipe_cnt].dout.wb = dout_wb; in dcn30_fpu_populate_dml_writeback_from_context()
349 display_e2e_pipe_params_st *pipes, in dcn30_fpu_set_mcif_arb_params()
358 wb_arb_params->cli_watermark[i] = get_wm_writeback_urgent(dml, pipes, pipe_cn in dcn30_fpu_set_mcif_arb_params()
257 dcn30_fpu_populate_dml_writeback_from_context( struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) dcn30_fpu_populate_dml_writeback_from_context() argument
347 dcn30_fpu_set_mcif_arb_params(struct mcif_arb_params *wb_arb_params, struct display_mode_lib *dml, display_e2e_pipe_params_st *pipes, int pipe_cnt, int cur_pipe) dcn30_fpu_set_mcif_arb_params() argument
379 dcn30_fpu_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_fpu_calculate_wm_and_dlg() argument
691 dcn30_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_find_dummy_latency_index_for_fw_based_mclk_switch() argument
[all...] |
| H A D | dcn30_fpu.h | 36 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
40 display_e2e_pipe_params_st *pipes,
48 display_e2e_pipe_params_st *pipes,
68 display_e2e_pipe_params_st *pipes,
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 308 display_e2e_pipe_params_st *pipes, in dcn314_populate_dml_pipes_from_context_fpu()
319 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, fast_validate); in dcn314_populate_dml_pipes_from_context_fpu()
334 pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min; in dcn314_populate_dml_pipes_from_context_fpu()
336 pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total; in dcn314_populate_dml_pipes_from_context_fpu()
340 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn314_populate_dml_pipes_from_context_fpu()
341 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn314_populate_dml_pipes_from_context_fpu()
346 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn314_populate_dml_pipes_from_context_fpu()
347 max(pipes[pipe_cn in dcn314_populate_dml_pipes_from_context_fpu()
307 dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, bool fast_validate) dcn314_populate_dml_pipes_from_context_fpu() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.h | 36 display_e2e_pipe_params_st *pipes,
46 display_e2e_pipe_params_st *pipes,
52 display_e2e_pipe_params_st *pipes,
58 display_e2e_pipe_params_st *pipes,
66 display_e2e_pipe_params_st *pipes,
72 void dcn32_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
|
| H A D | dcn32_fpu.c | 264 display_e2e_pipe_params_st *pipes, in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
280 dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, false); in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
282 /* for subvp + DRR case, if subvp pipes are still present we support pstate */ in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
309 * dcn32_helper_populate_phantom_dlg_params - Get DLG params for phantom pipes
313 * @pipes: [in] DML pipe params array
316 * This function must be called AFTER the phantom pipes are added to context
317 * and run through DML (so that the DLG params for the phantom pipes can be
318 * populated), and BEFORE we program the timing for the phantom pipes.
322 display_e2e_pipe_params_st *pipes, in dcn32_helper_populate_phantom_dlg_params()
336 pipes[pipe_id in dcn32_helper_populate_phantom_dlg_params()
262 dcn32_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn32_find_dummy_latency_index_for_fw_based_mclk_switch() argument
320 dcn32_helper_populate_phantom_dlg_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn32_helper_populate_phantom_dlg_params() argument
537 dcn32_set_phantom_stream_timing(struct dc *dc, struct dc_state *context, struct pipe_ctx *ref_pipe, struct dc_stream_state *phantom_stream, display_e2e_pipe_params_st *pipes, unsigned int pipe_cnt, unsigned int dc_pipe_idx) dcn32_set_phantom_stream_timing() argument
1147 dcn32_full_validate_bw_helper(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *vlevel, int *split, bool *merge, int *pipe_cnt) dcn32_full_validate_bw_helper() argument
1346 dcn32_calculate_dlg_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn32_calculate_dlg_params() argument
1638 dcn32_internal_validate_bw(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *vlevel_out, bool fast_validate) dcn32_internal_validate_bw() argument
1959 dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn32_calculate_wm_and_dlg_fpu() argument
2938 dcn32_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn32_zero_pipe_dcc_fraction() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.h | 51 display_e2e_pipe_params_st *pipes,
64 display_e2e_pipe_params_st *pipes,
71 display_e2e_pipe_params_st *pipes,
76 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
80 display_e2e_pipe_params_st *pipes,
106 display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel);
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 443 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, in dcn31_zero_pipe_dcc_fraction() argument
448 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; in dcn31_zero_pipe_dcc_fraction()
449 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; in dcn31_zero_pipe_dcc_fraction()
482 display_e2e_pipe_params_st *pipes, in dcn31_calculate_wm_and_dlg_fp()
503 pipes[0].clks_cfg.voltage = vlevel; in dcn31_calculate_wm_and_dlg_fp()
504 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()
505 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
513 context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
514 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
515 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cn in dcn31_calculate_wm_and_dlg_fp()
480 dcn31_calculate_wm_and_dlg_fp( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn31_calculate_wm_and_dlg_fp() argument
[all...] |
| H A D | dcn31_fpu.h | 34 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
42 display_e2e_pipe_params_st *pipes,
56 display_e2e_pipe_params_st *pipes,
|
| /kernel/linux/linux-5.10/sound/sparc/ |
| H A D | dbri.c | 31 * memory and a serial device (long pipes, no. 0-15) or between two serial
32 * devices (short pipes, no. 16-31), or simply send a fixed data to a serial
33 * device (short pipes).
36 * each serial device (NT,TE,CHI). A timeslot is associated to 1 or 2 pipes
313 struct dbri_pipe pipes[DBRI_NO_PIPES]; /* DBRI's 32 data pipes */ member
364 #define D_PAUSE 0x1 /* Flush long pipes */
421 #define D_TS_ANCHOR (7<<10) /* Starting short pipes */
575 * Short data pipes transmit LSB first. The CS4215 receives MSB first. Grrr.
768 /* Initialize pipes */ in dbri_initialize()
[all...] |
| /kernel/linux/linux-6.6/sound/sparc/ |
| H A D | dbri.c | 31 * memory and a serial device (long pipes, no. 0-15) or between two serial
32 * devices (short pipes, no. 16-31), or simply send a fixed data to a serial
33 * device (short pipes).
36 * each serial device (NT,TE,CHI). A timeslot is associated to 1 or 2 pipes
312 struct dbri_pipe pipes[DBRI_NO_PIPES]; /* DBRI's 32 data pipes */ member
363 #define D_PAUSE 0x1 /* Flush long pipes */
420 #define D_TS_ANCHOR (7<<10) /* Starting short pipes */
574 * Short data pipes transmit LSB first. The CS4215 receives MSB first. Grrr.
767 /* Initialize pipes */ in dbri_initialize()
[all...] |
| /kernel/linux/linux-5.10/drivers/platform/goldfish/ |
| H A D | goldfish_pipe.c | 127 /* pipe ID - index into goldfish_pipe_dev::pipes array */
144 /* doubly linked list of signalled pipes, protected by
177 * - pipes, pipes_capacity
178 * - [*pipes, *pipes + pipes_capacity) - array data
183 * in all allocated pipes
187 * the only operation that happens often is the signalled pipes array
195 * Array of the pipes of |pipes_capacity| elements,
198 struct goldfish_pipe **pipes; member
204 /* Head of a doubly linked list of signalled pipes */
666 struct goldfish_pipe **pipes = get_free_pipe_id_locked() local
[all...] |
| /kernel/linux/linux-6.6/drivers/platform/goldfish/ |
| H A D | goldfish_pipe.c | 127 /* pipe ID - index into goldfish_pipe_dev::pipes array */
144 /* doubly linked list of signalled pipes, protected by
177 * - pipes, pipes_capacity
178 * - [*pipes, *pipes + pipes_capacity) - array data
183 * in all allocated pipes
187 * the only operation that happens often is the signalled pipes array
195 * Array of the pipes of |pipes_capacity| elements,
198 struct goldfish_pipe **pipes; member
204 /* Head of a doubly linked list of signalled pipes */
663 struct goldfish_pipe **pipes = get_free_pipe_id_locked() local
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 46 const display_e2e_pipe_params_st *pipes,
54 const display_e2e_pipe_params_st *pipes, in dml_get_voltage_level()
60 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
65 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
68 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()
82 #define dml_get_attr_func(attr, var) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) \
84 recalculate_params(mode_lib, pipes, num_pipes); \
130 #define dml_get_pipe_attr_func(attr, var) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes, unsigned int which_pipe) \
133 recalculate_params(mode_lib, pipes, num_pipe
52 dml_get_voltage_level( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) dml_get_voltage_level() argument
207 get_total_immediate_flip_bytes( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) get_total_immediate_flip_bytes() argument
216 get_total_immediate_flip_bw( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) get_total_immediate_flip_bw() argument
229 get_total_prefetch_bw( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) get_total_prefetch_bw() argument
243 get_total_surface_size_in_mall_bytes( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) get_total_surface_size_in_mall_bytes() argument
275 get_det_buffer_size_kbytes(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes, unsigned int pipe_idx) get_det_buffer_size_kbytes() argument
292 get_is_phantom_pipe(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes, unsigned int pipe_idx) get_is_phantom_pipe() argument
517 display_e2e_pipe_params_st *pipes = mode_lib->vba.cache_pipes; fetch_pipe_params() local
957 recalculate_params( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) recalculate_params() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.h | 48 display_e2e_pipe_params_st *pipes,
60 display_e2e_pipe_params_st *pipes,
64 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
68 display_e2e_pipe_params_st *pipes);
|
| H A D | dcn30_resource.c | 1450 display_e2e_pipe_params_st *pipes) in dcn30_populate_dml_pipes_from_context()
1455 dcn20_populate_dml_pipes_from_context(dc, context, pipes); in dcn30_populate_dml_pipes_from_context()
1461 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1469 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn30_populate_dml_writeback_from_context()
1484 pipes[pipe_cnt].dout.wb_enable = 0; in dcn30_populate_dml_writeback_from_context()
1485 pipes[pipe_cnt].dout.num_active_wb = 0; in dcn30_populate_dml_writeback_from_context()
1491 pipes[pipe_cnt].dout.wb_enable = 1; in dcn30_populate_dml_writeback_from_context()
1492 pipes[pipe_cnt].dout.num_active_wb++; in dcn30_populate_dml_writeback_from_context()
1535 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz, in dcn30_populate_dml_writeback_from_context()
1542 pipes[pipe_cn in dcn30_populate_dml_writeback_from_context()
1448 dcn30_populate_dml_pipes_from_context( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes) dcn30_populate_dml_pipes_from_context() argument
1468 dcn30_populate_dml_writeback_from_context( struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) dcn30_populate_dml_writeback_from_context() argument
1580 dcn30_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn30_set_mcif_arb_params() argument
1943 dcn30_internal_validate_bw( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *pipe_cnt_out, int *vlevel_out, bool fast_validate) dcn30_internal_validate_bw() argument
2217 dcn30_calculate_wm_and_dlg_fp( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_calculate_wm_and_dlg_fp() argument
2373 dcn30_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_calculate_wm_and_dlg() argument
2394 display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_KERNEL); dcn30_validate_bandwidth() local
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_resource.h | 45 display_e2e_pipe_params_st *pipes,
50 display_e2e_pipe_params_st *pipes,
55 display_e2e_pipe_params_st *pipes);
59 display_e2e_pipe_params_st *pipes,
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 46 const display_e2e_pipe_params_st *pipes,
53 const display_e2e_pipe_params_st *pipes, in dml_get_voltage_level()
59 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
64 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
67 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()
80 #define dml_get_attr_func(attr, var) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) \
82 recalculate_params(mode_lib, pipes, num_pipes); \
108 #define dml_get_pipe_attr_func(attr, var) double get_##attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes, unsigned int which_pipe) \
111 recalculate_params(mode_lib, pipes, num_pipe
51 dml_get_voltage_level( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) dml_get_voltage_level() argument
162 get_total_immediate_flip_bytes( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) get_total_immediate_flip_bytes() argument
171 get_total_immediate_flip_bw( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) get_total_immediate_flip_bw() argument
184 get_total_prefetch_bw( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) get_total_prefetch_bw() argument
366 display_e2e_pipe_params_st *pipes = mode_lib->vba.cache_pipes; fetch_pipe_params() local
709 recalculate_params( struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_pipes) recalculate_params() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_event.c | 110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame()
120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events()
146 komeda_sprintf(&str, ", pipes[0]: "); in komeda_print_events()
147 evt_str(&str, evts->pipes[0]); in komeda_print_events()
148 komeda_sprintf(&str, ", pipes[1]: "); in komeda_print_events()
149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_event.c | 110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame()
120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events()
146 komeda_sprintf(&str, ", pipes[0]: "); in komeda_print_events()
147 evt_str(&str, evts->pipes[0]); in komeda_print_events()
148 komeda_sprintf(&str, ", pipes[1]: "); in komeda_print_events()
149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/tidss/ |
| H A D | tidss_kms.c | 120 struct pipe pipes[TIDSS_MAX_PORTS]; in tidss_dispc_modeset_init() local
178 pipes[num_pipes].hw_videoport = i; in tidss_dispc_modeset_init()
179 pipes[num_pipes].bridge = bridge; in tidss_dispc_modeset_init()
180 pipes[num_pipes].enc_type = enc_type; in tidss_dispc_modeset_init()
205 tcrtc = tidss_crtc_create(tidss, pipes[i].hw_videoport, in tidss_dispc_modeset_init()
214 ret = tidss_encoder_create(tidss, pipes[i].bridge, in tidss_dispc_modeset_init()
215 pipes[i].enc_type, in tidss_dispc_modeset_init()
|