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Searched refs:pipe_plane (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c1913 int pipe_plane = v->pipe_plane[pipe_idx]; in dcn20_validate_apply_pipe_split_flags() local
1920 if (split4mpc || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 4) in dcn20_validate_apply_pipe_split_flags()
1922 else if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 2) in dcn20_validate_apply_pipe_split_flags()
1936 v->ODMCombineEnablePerState[vlevel][pipe_plane] = dm_odm_combine_mode_2to1; in dcn20_validate_apply_pipe_split_flags()
1940 v->ODMCombineEnablePerState[vlevel][pipe_plane] = dm_odm_combine_mode_4to1; in dcn20_validate_apply_pipe_split_flags()
1947 v->ODMCombineEnabled[pipe_plane] = in dcn20_validate_apply_pipe_split_flags()
1948 v->ODMCombineEnablePerState[vlevel][pipe_plane]; in dcn20_validate_apply_pipe_split_flags()
1950 if (v->ODMCombineEnabled[pipe_plane] == dm_odm_combine_mode_disabled) { in dcn20_validate_apply_pipe_split_flags()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.c134 which_plane = mode_lib->vba.pipe_plane[which_pipe]; \
264 if (plane_idx == mode_lib->vba.pipe_plane[i]) { in get_pipe_idx()
282 plane_idx = mode_lib->vba.pipe_plane[pipe_idx]; in get_det_buffer_size_kbytes()
298 plane_idx = mode_lib->vba.pipe_plane[pipe_idx]; in get_is_phantom_pipe()
545 mode_lib->vba.pipe_plane[j] = mode_lib->vba.NumberOfActivePlanes; in fetch_pipe_params()
789 mode_lib->vba.pipe_plane[k] = in fetch_pipe_params()
H A Ddisplay_mode_vba.h589 unsigned int pipe_plane[DC__NUM_DPP__MAX]; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c591 num_dpp = vba->NoOfDPP[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]]; in dcn32_set_phantom_stream_timing()
592 phantom_vactive += num_dpp > 1 ? vba->meta_row_height[vba->pipe_plane[pipe_idx]] : 0; in dcn32_set_phantom_stream_timing()
705 (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]] <= 0 || in dcn32_assign_subvp_pipe()
706 (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]] > 0 && in dcn32_assign_subvp_pipe()
1119 if (vba->ActiveDRAMClockChangeLatencyMarginPerState[vlevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]] > 0 && in subvp_validate_static_schedulability()
1435 if (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]] > 0) in dcn32_calculate_dlg_params()
1721 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn32_internal_validate_bw()
1819 odm = vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled; in dcn32_internal_validate_bw()
3091 if (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]] <= 0) { in dcn32_assign_fpo_vactive_candidate()
3123 if (vba->ActiveDRAMClockChangeLatencyMarginPerState[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_id in dcn32_find_vactive_pipe()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c2732 int pipe_plane = v->pipe_plane[pipe_idx]; local
2739 if (split4mpc || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 4)
2741 else if (force_split || v->NoOfDPP[vlevel][max_mpc_comb][pipe_plane] == 2)
2755 v->ODMCombineEnablePerState[vlevel][pipe_plane] = dm_odm_combine_mode_2to1;
2760 v->ODMCombineEnablePerState[vlevel][pipe_plane] = dm_odm_combine_mode_4to1;
2768 v->ODMCombineEnabled[pipe_plane] =
2769 v->ODMCombineEnablePerState[vlevel][pipe_plane];
2771 if (v->ODMCombineEnabled[pipe_plane] == dm_odm_combine_mode_disabled) {
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.c112 which_plane = mode_lib->vba.pipe_plane[which_pipe]; \
393 mode_lib->vba.pipe_plane[j] = mode_lib->vba.NumberOfActivePlanes; in fetch_pipe_params()
607 mode_lib->vba.pipe_plane[k] = in fetch_pipe_params()
H A Ddisplay_mode_vba.h403 unsigned int pipe_plane[DC__NUM_DPP__MAX]; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.c1707 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn30_internal_validate_bw()
1776 odm = vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled; in dcn30_internal_validate_bw()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.c2032 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn30_internal_validate_bw()
2100 odm = vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled; in dcn30_internal_validate_bw()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c856 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn21_fast_validate_bw()

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