| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 991 int pipe_cnt, i; in dcn20_populate_dml_writeback_from_context() local
995 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn20_populate_dml_writeback_from_context()
1002 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1003 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1004 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1005 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1006 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1007 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1008 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1009 pipes[pipe_cnt] in dcn20_populate_dml_writeback_from_context()
1027 dcn20_fpu_set_wb_arb_params(struct mcif_arb_params *wb_arb_params, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int i) dcn20_fpu_set_wb_arb_params() argument
1134 dcn20_calculate_dlg_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn20_calculate_dlg_params() argument
1313 int pipe_cnt, i; dcn20_populate_dml_pipes_from_context() local
1729 int pipe_cnt, i, pipe_idx; dcn20_calculate_wm() local
2029 int pipe_cnt = 0; dcn20_validate_bandwidth_internal() local
2154 uint32_t pipe_cnt; dcn21_populate_dml_pipes_from_context() local
2200 calculate_wm_set_for_vlevel(int vlevel, struct wm_range_table_entry *table_entry, struct dcn_watermarks *wm_set, struct display_mode_lib *dml, display_e2e_pipe_params_st *pipes, int pipe_cnt) calculate_wm_set_for_vlevel() argument
2237 int pipe_cnt, i, pipe_idx; dcn21_calculate_wm() local
2324 int pipe_cnt = 0; dcn21_validate_bandwidth_fp() local
2476 int pipe_cnt, i, j; dcn201_populate_dml_writeback_from_context_fpu() local
[all...] |
| H A D | dcn20_fpu.h | 38 int pipe_cnt, int i);
42 int pipe_cnt,
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_resource.c | 1972 int pipe_cnt, i; in dcn20_populate_dml_writeback_from_context() local
1974 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn20_populate_dml_writeback_from_context()
1981 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1982 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1983 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1984 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1985 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1986 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1987 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1988 pipes[pipe_cnt] in dcn20_populate_dml_writeback_from_context()
2009 int pipe_cnt, i; global() local
2424 dcn20_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) global() argument
2848 int pipe_cnt, i, pipe_idx, vlevel; global() local
2962 int pipe_cnt, i, pipe_idx; global() local
3070 dcn20_calculate_dlg_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) global() argument
3147 int pipe_cnt = 0; global() local
[all...] |
| H A D | dcn20_resource.h | 119 int pipe_cnt);
159 int pipe_cnt,
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 311 int i, pipe_cnt; in dcn314_populate_dml_pipes_from_context_fpu() local
321 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn314_populate_dml_pipes_from_context_fpu()
334 pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min; in dcn314_populate_dml_pipes_from_context_fpu()
336 pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total; in dcn314_populate_dml_pipes_from_context_fpu()
340 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn314_populate_dml_pipes_from_context_fpu()
341 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn314_populate_dml_pipes_from_context_fpu()
346 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn314_populate_dml_pipes_from_context_fpu()
347 max(pipes[pipe_cnt] in dcn314_populate_dml_pipes_from_context_fpu()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 260 int pipe_cnt, i, j; in dcn30_fpu_populate_dml_writeback_from_context() local
267 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_fpu_populate_dml_writeback_from_context()
275 pipes[pipe_cnt].dout.wb_enable = 0; in dcn30_fpu_populate_dml_writeback_from_context()
276 pipes[pipe_cnt].dout.num_active_wb = 0; in dcn30_fpu_populate_dml_writeback_from_context()
282 pipes[pipe_cnt].dout.wb_enable = 1; in dcn30_fpu_populate_dml_writeback_from_context()
283 pipes[pipe_cnt].dout.num_active_wb++; in dcn30_fpu_populate_dml_writeback_from_context()
326 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz, in dcn30_fpu_populate_dml_writeback_from_context()
333 pipes[pipe_cnt].pipe.dest.htotal, in dcn30_fpu_populate_dml_writeback_from_context()
338 pipes[pipe_cnt].dout.wb = dout_wb; in dcn30_fpu_populate_dml_writeback_from_context()
343 pipe_cnt in dcn30_fpu_populate_dml_writeback_from_context()
347 dcn30_fpu_set_mcif_arb_params(struct mcif_arb_params *wb_arb_params, struct display_mode_lib *dml, display_e2e_pipe_params_st *pipes, int pipe_cnt, int cur_pipe) dcn30_fpu_set_mcif_arb_params() argument
379 dcn30_fpu_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_fpu_calculate_wm_and_dlg() argument
691 dcn30_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_find_dummy_latency_index_for_fw_based_mclk_switch() argument
[all...] |
| H A D | dcn30_fpu.h | 41 int pipe_cnt,
49 int pipe_cnt,
69 int pipe_cnt,
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.h | 37 int pipe_cnt);
47 unsigned int pipe_cnt,
59 int pipe_cnt,
67 int pipe_cnt,
73 int pipe_cnt);
|
| H A D | dcn32_fpu.c | 265 int pipe_cnt, in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
280 dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, false); in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
314 * @pipe_cnt: [in] DML pipe count
323 int pipe_cnt) in dcn32_helper_populate_phantom_dlg_params()
337 get_vstartup(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_helper_populate_phantom_dlg_params()
339 get_vupdate_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_helper_populate_phantom_dlg_params()
341 get_vupdate_width(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_helper_populate_phantom_dlg_params()
343 get_vready_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn32_helper_populate_phantom_dlg_params()
522 * @pipe_cnt: number of DML pipes
542 unsigned int pipe_cnt, in dcn32_set_phantom_stream_timing()
262 dcn32_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn32_find_dummy_latency_index_for_fw_based_mclk_switch() argument
320 dcn32_helper_populate_phantom_dlg_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn32_helper_populate_phantom_dlg_params() argument
537 dcn32_set_phantom_stream_timing(struct dc *dc, struct dc_state *context, struct pipe_ctx *ref_pipe, struct dc_stream_state *phantom_stream, display_e2e_pipe_params_st *pipes, unsigned int pipe_cnt, unsigned int dc_pipe_idx) dcn32_set_phantom_stream_timing() argument
1147 dcn32_full_validate_bw_helper(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int *vlevel, int *split, bool *merge, int *pipe_cnt) dcn32_full_validate_bw_helper() argument
1346 dcn32_calculate_dlg_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn32_calculate_dlg_params() argument
1650 int pipe_cnt, i, pipe_idx; dcn32_internal_validate_bw() local
1959 dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn32_calculate_wm_and_dlg_fpu() argument
2938 dcn32_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn32_zero_pipe_dcc_fraction() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 297 int pipe_cnt) in calculate_wm_set_for_vlevel()
311 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
312 wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
313 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
314 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
315 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
316 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
317 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
318 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
415 int pipe_cnt, in dcn301_calculate_wm_and_dlg_fp()
292 calculate_wm_set_for_vlevel(int vlevel, struct wm_range_table_entry *table_entry, struct dcn_watermarks *wm_set, struct display_mode_lib *dml, display_e2e_pipe_params_st *pipes, int pipe_cnt) calculate_wm_set_for_vlevel() argument
412 dcn301_calculate_wm_and_dlg_fp(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel_req) dcn301_calculate_wm_and_dlg_fp() argument
[all...] |
| H A D | dcn301_fpu.h | 40 int pipe_cnt,
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 444 int pipe_cnt) in dcn31_zero_pipe_dcc_fraction()
448 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; in dcn31_zero_pipe_dcc_fraction()
449 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; in dcn31_zero_pipe_dcc_fraction()
483 int pipe_cnt, in dcn31_calculate_wm_and_dlg_fp()
498 if (pipe_cnt == 0) { in dcn31_calculate_wm_and_dlg_fp()
513 context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
514 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
515 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
516 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
517 context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_z8_ns = get_wm_z8_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 100 in dcn31_calculate_wm_and_dlg_fp()
443 dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn31_zero_pipe_dcc_fraction() argument
480 dcn31_calculate_wm_and_dlg_fp( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn31_calculate_wm_and_dlg_fp() argument
[all...] |
| H A D | dcn31_fpu.h | 35 int pipe_cnt);
43 int pipe_cnt,
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_resource.c | 1031 int pipe_cnt) in calculate_wm_set_for_vlevel()
1045 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1046 wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1047 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1048 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1049 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1050 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1051 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1052 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1094 int pipe_cnt, in dcn21_calculate_wm() local
1025 calculate_wm_set_for_vlevel( int vlevel, struct wm_range_table_entry *table_entry, struct dcn_watermarks *wm_set, struct display_mode_lib *dml, display_e2e_pipe_params_st *pipes, int pipe_cnt) calculate_wm_set_for_vlevel() argument
1181 int pipe_cnt = 0; dcn21_validate_bandwidth_fp() local
1752 uint32_t pipe_cnt = dcn20_populate_dml_pipes_from_context(dc, context, pipes); dcn21_populate_dml_pipes_from_context() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.c | 1452 int i, pipe_cnt; in dcn30_populate_dml_pipes_from_context() local
1457 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_populate_dml_pipes_from_context()
1461 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1465 return pipe_cnt; in dcn30_populate_dml_pipes_from_context()
1471 int pipe_cnt, i, j; in dcn30_populate_dml_writeback_from_context() local
1476 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_populate_dml_writeback_from_context()
1484 pipes[pipe_cnt].dout.wb_enable = 0; in dcn30_populate_dml_writeback_from_context()
1485 pipes[pipe_cnt].dout.num_active_wb = 0; in dcn30_populate_dml_writeback_from_context()
1491 pipes[pipe_cnt].dout.wb_enable = 1; in dcn30_populate_dml_writeback_from_context()
1492 pipes[pipe_cnt] in dcn30_populate_dml_writeback_from_context()
1580 dcn30_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn30_set_mcif_arb_params() argument
1956 int pipe_cnt, i, pipe_idx, vlevel; dcn30_internal_validate_bw() local
2217 dcn30_calculate_wm_and_dlg_fp( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_calculate_wm_and_dlg_fp() argument
2373 dcn30_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_calculate_wm_and_dlg() argument
2393 int pipe_cnt = 0; dcn30_validate_bandwidth() local
[all...] |
| H A D | dcn30_resource.h | 49 int pipe_cnt);
61 int pipe_cnt,
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn315/ |
| H A D | dcn315_resource.c | 1661 int i, pipe_cnt, crb_idx, crb_pipes; in dcn315_populate_dml_pipes_from_context() local
1672 for (i = 0, pipe_cnt = 0, crb_pipes = 0; i < dc->res_pool->pipe_count; i++) { in dcn315_populate_dml_pipes_from_context()
1685 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn315_populate_dml_pipes_from_context()
1687 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn315_populate_dml_pipes_from_context()
1688 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn315_populate_dml_pipes_from_context()
1689 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn315_populate_dml_pipes_from_context()
1690 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn315_populate_dml_pipes_from_context()
1692 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn315_populate_dml_pipes_from_context()
1694 int bpp = source_format_to_bpp(pipes[pipe_cnt].pipe.src.source_format); in dcn315_populate_dml_pipes_from_context()
1709 pipes[pipe_cnt] in dcn315_populate_dml_pipes_from_context()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.h | 52 int pipe_cnt);
72 int pipe_cnt,
106 display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel);
|
| H A D | dcn30_resource.c | 1322 int i, pipe_cnt; in dcn30_populate_dml_pipes_from_context() local
1329 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn30_populate_dml_pipes_from_context()
1333 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1337 return pipe_cnt; in dcn30_populate_dml_pipes_from_context()
1375 int pipe_cnt) in dcn30_set_mcif_arb_params()
1405 dcn30_fpu_set_mcif_arb_params(wb_arb_params, dml, pipes, pipe_cnt, j); in dcn30_set_mcif_arb_params()
1639 int pipe_cnt, i, pipe_idx, vlevel; in dcn30_internal_validate_bw() local
1650 pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate); in dcn30_internal_validate_bw()
1652 if (!pipe_cnt) { in dcn30_internal_validate_bw()
1657 dml_log_pipe_params(&context->bw_ctx.dml, pipes, pipe_cnt); in dcn30_internal_validate_bw()
1371 dcn30_set_mcif_arb_params( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn30_set_mcif_arb_params() argument
2022 dcn30_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn30_calculate_wm_and_dlg() argument
2042 int pipe_cnt = 0; dcn30_validate_bandwidth() local
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_resource.c | 1618 uint32_t pipe_cnt; in dcn31x_populate_dml_pipes_from_context() local
1623 pipe_cnt = dcn20_populate_dml_pipes_from_context(dc, context, pipes, fast_validate); in dcn31x_populate_dml_pipes_from_context()
1625 for (i = 0; i < pipe_cnt; i++) { in dcn31x_populate_dml_pipes_from_context()
1628 //pipes[pipe_cnt].pipe.src.hostvm = dc->res_pool->hubbub->riommu_active; in dcn31x_populate_dml_pipes_from_context()
1635 return pipe_cnt; in dcn31x_populate_dml_pipes_from_context()
1643 int i, pipe_cnt; in dcn31_populate_dml_pipes_from_context() local
1652 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn31_populate_dml_pipes_from_context()
1669 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn31_populate_dml_pipes_from_context()
1670 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn31_populate_dml_pipes_from_context()
1671 pipes[pipe_cnt] in dcn31_populate_dml_pipes_from_context()
1720 dcn31_calculate_wm_and_dlg( struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn31_calculate_wm_and_dlg() argument
1742 dcn31_set_mcif_arb_params(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt) dcn31_set_mcif_arb_params() argument
1761 int pipe_cnt = 0; dcn31_validate_bandwidth() local
[all...] |
| H A D | dcn31_resource.h | 46 int pipe_cnt,
60 int pipe_cnt);
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.c | 1677 unsigned int pipe_cnt, in dcn32_enable_phantom_stream()
1696 dcn32_set_phantom_stream_timing(dc, context, ref_pipe, phantom_stream, pipes, pipe_cnt, dc_pipe_idx); in dcn32_enable_phantom_stream()
1779 unsigned int pipe_cnt, in dcn32_add_phantom_pipes()
1788 phantom_stream = dcn32_enable_phantom_stream(dc, context, pipes, pipe_cnt, index); in dcn32_add_phantom_pipes()
1817 int pipe_cnt = 0; in dcn32_validate_bandwidth() local
1846 out = dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate); in dcn32_validate_bandwidth()
1852 if (pipe_cnt == 0) in dcn32_validate_bandwidth()
1865 dc->res_pool->funcs->calculate_wm_and_dlg(dc, context, pipes, pipe_cnt, vlevel); in dcn32_validate_bandwidth()
1893 int i, pipe_cnt; in dcn32_populate_dml_pipes_from_context() local
1909 for (i = 0, pipe_cnt in dcn32_populate_dml_pipes_from_context()
1674 dcn32_enable_phantom_stream(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, unsigned int pipe_cnt, unsigned int dc_pipe_idx) dcn32_enable_phantom_stream() argument
1777 dcn32_add_phantom_pipes(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, unsigned int pipe_cnt, unsigned int index) dcn32_add_phantom_pipes() argument
2016 dcn32_calculate_wm_and_dlg(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel) dcn32_calculate_wm_and_dlg() argument
[all...] |
| H A D | dcn32_resource_helpers.c | 289 uint8_t pipe_cnt = 0; in dcn32_determine_det_override() local
339 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_determine_det_override()
342 pipes[pipe_cnt].pipe.src.det_size_override = pipe_segments[i] * DCN3_2_DET_SEG_SIZE; in dcn32_determine_det_override()
343 pipe_cnt++; in dcn32_determine_det_override()
354 int i, pipe_cnt; in dcn32_set_det_allocations() local
359 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn32_set_det_allocations()
365 pipe_cnt++; in dcn32_set_det_allocations()
372 if (pipe_cnt == 1) { in dcn32_set_det_allocations()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn316/ |
| H A D | dcn316_resource.c | 1614 int i, pipe_cnt; in dcn316_populate_dml_pipes_from_context() local
1623 for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) { in dcn316_populate_dml_pipes_from_context()
1636 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn316_populate_dml_pipes_from_context()
1638 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn316_populate_dml_pipes_from_context()
1639 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn316_populate_dml_pipes_from_context()
1640 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn316_populate_dml_pipes_from_context()
1641 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn316_populate_dml_pipes_from_context()
1643 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn316_populate_dml_pipes_from_context()
1646 if (pipes[pipe_cnt].dout.dsc_enable) { in dcn316_populate_dml_pipes_from_context()
1649 pipes[pipe_cnt] in dcn316_populate_dml_pipes_from_context()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | core_types.h | 87 int pipe_cnt,
164 int pipe_cnt);
189 unsigned int pipe_cnt,
|