Searched refs:overlay_dma_base (Results 1 - 8 of 8) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvfw/ |
| H A D | flcn.h | 15 u32 overlay_dma_base; member
35 u64 overlay_dma_base; member
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvfw/ |
| H A D | flcn.h | 15 u32 overlay_dma_base; member
35 u64 overlay_dma_base; member
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
| H A D | gm20b.c | 88 addr = ((u64)hdr.overlay_dma_base1 << 40 | hdr.overlay_dma_base << 8); in gm20b_pmu_acr_bld_patch()
89 hdr.overlay_dma_base = lower_32_bits((addr + adjust) << 8); in gm20b_pmu_acr_bld_patch()
111 .overlay_dma_base = lower_32_bits(code), in gm20b_pmu_acr_bld_write()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/nvfw/ |
| H A D | flcn.c | 36 nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base); in loader_config_dump()
57 nvkm_debug(subdev, "\toverlayDmaBase: 0x%llx\n", hdr->overlay_dma_base); in loader_config_v1_dump()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/nvfw/ |
| H A D | flcn.c | 36 nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base); in loader_config_dump()
57 nvkm_debug(subdev, "\toverlayDmaBase: 0x%llx\n", hdr->overlay_dma_base); in loader_config_v1_dump()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/sec2/ |
| H A D | gp102.c | 94 hdr.overlay_dma_base = hdr.overlay_dma_base + adjust; in gp102_sec2_acr_bld_patch()
112 .overlay_dma_base = lsfw->offset.img + lsfw->app_start_offset, in gp102_sec2_acr_bld_write()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/sec2/ |
| H A D | gp102.c | 84 hdr.overlay_dma_base = hdr.overlay_dma_base + adjust; in gp102_sec2_acr_bld_patch()
102 .overlay_dma_base = lsfw->offset.img + lsfw->app_start_offset, in gp102_sec2_acr_bld_write()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
| H A D | gm20b.c | 78 addr = ((u64)hdr.overlay_dma_base1 << 40 | hdr.overlay_dma_base << 8); in gm20b_pmu_acr_bld_patch()
79 hdr.overlay_dma_base = lower_32_bits((addr + adjust) << 8); in gm20b_pmu_acr_bld_patch()
101 .overlay_dma_base = lower_32_bits(code), in gm20b_pmu_acr_bld_write()
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