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Searched refs:num_dsc (Results 1 - 25 of 39) sorted by relevance

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/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_rm.c469 int num_dsc = top->num_dsc; in _dpu_rm_reserve_dsc() local
473 for (i = 0; i < num_dsc; i++) { in _dpu_rm_reserve_dsc()
485 for (i = 0; i < num_dsc; i++) in _dpu_rm_reserve_dsc()
526 DRM_DEBUG_KMS("num_lm: %d num_dsc: %d num_intf: %d\n", in _dpu_rm_populate_requirements()
527 reqs->topology.num_lm, reqs->topology.num_dsc, in _dpu_rm_populate_requirements()
H A Ddpu_encoder.c539 int i, intf_count = 0, num_dsc = 0; in dpu_encoder_use_dsc_merge() local
547 num_dsc = 2; in dpu_encoder_use_dsc_merge()
549 return (num_dsc > 0) && (num_dsc > intf_count); in dpu_encoder_use_dsc_merge()
608 topology.num_dsc = 2; in dpu_encoder_get_topology()
1058 int num_lm, num_ctl, num_pp, num_dsc; in dpu_encoder_virt_atomic_mode_set() local
1097 num_dsc = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, in dpu_encoder_virt_atomic_mode_set()
1100 for (i = 0; i < num_dsc; i++) { in dpu_encoder_virt_atomic_mode_set()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/
H A Dresource.h50 int num_dsc; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c76 .num_dsc = 3,
221 .num_dsc = 3,
319 .num_dsc = 3,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/
H A Dresource.h54 int num_dsc; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c101 .num_dsc = 3,
808 .num_dsc = 3,
821 .num_dsc = 0,
833 .num_dsc = 2,
921 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_destruct()
2069 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c668 .num_dsc = 6,
706 .num_dsc = 5,
1096 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_destruct()
1322 if (pool->res_cap->num_dsc == pool->res_cap->num_opp) { in dcn20_acquire_dsc()
1336 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_acquire_dsc()
1350 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_release_dsc()
2688 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c581 .num_dsc = 3,
594 .num_dsc = 0,
606 .num_dsc = 2,
690 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_destruct()
1677 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn21_resource_construct()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h140 unsigned int num_dsc; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn302/
H A Ddcn302_fpu.c44 .num_dsc = 5,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn303/
H A Ddcn303_fpu.c43 .num_dsc = 2,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn302/
H A Ddcn302_resource.c129 .num_dsc = 5,
1004 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_destruct()
1427 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn302_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn303/
H A Ddcn303_resource.c108 .num_dsc = 2,
930 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_destruct()
1339 for (i = 0; i < pool->res_cap->num_dsc; i++) { in dcn303_resource_construct()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c100 .num_dsc = 6,
166 .num_dsc = 5,
1019 .num_dsc = 6,
1059 .num_dsc = 5,
1470 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn20_resource_destruct()
1680 if (pool->res_cap->num_dsc == pool->res_cap->num_opp) { in dcn20_acquire_dsc()
1694 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_acquire_dsc()
1708 for (i = 0; i < pool->res_cap->num_dsc; i++) in dcn20_release_dsc()
4079 for (i = 0; i < pool->base.res_cap->num_dsc; i++) {
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c46 .num_dsc = 3,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddcn314_fpu.c57 .num_dsc = 4,
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h272 unsigned int num_dsc; member
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/
H A Dmsm_drv.h94 * @num_dsc: number of Display Stream Compression (DSC) blocks used
100 u32 num_dsc; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_resource.c826 .num_dsc = 3,
1382 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn31_resource_destruct()
2122 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn31_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn321/
H A Ddcn321_resource.c653 .num_dsc = 4,
1368 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn321_resource_destruct()
1922 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn321_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_resource.c649 .num_dsc = 3,
1052 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn301_destruct()
1643 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn301_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn315/
H A Ddcn315_resource.c825 .num_dsc = 3,
1382 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn315_resource_destruct()
2066 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn315_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_resource.c837 .num_dsc = 4,
1455 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn314_resource_destruct()
2088 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn314_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn316/
H A Ddcn316_resource.c822 .num_dsc = 3,
1380 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn316_resource_destruct()
1953 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn316_resource_construct()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.c678 .num_dsc = 6,
1082 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn30_resource_destruct()
2512 for (i = 0; i < pool->base.res_cap->num_dsc; i++) { in dcn30_resource_construct()

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