H A D | umc_v8_10.c | 71 uint32_t node_inst, in get_umc_v8_10_reg_offset() 76 UMC_8_NODE_DIST * node_inst; in get_umc_v8_10_reg_offset() 80 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_clear_error_count_per_channel() 85 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_clear_error_count_per_channel() 144 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_ecc_error_count() 149 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_query_ecc_error_count() 208 uint32_t node_inst, uint64_t mc_umc_status) in umc_v8_10_convert_error_address() 216 adev->umc.channel_idx_tbl[node_inst * adev->umc.umc_inst_num * in umc_v8_10_convert_error_address() 245 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_error_address() 253 get_umc_v8_10_reg_offset(adev, node_inst, umc_ins in umc_v8_10_query_error_address() 70 get_umc_v8_10_reg_offset(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst) get_umc_v8_10_reg_offset() argument 79 umc_v8_10_clear_error_count_per_channel(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_clear_error_count_per_channel() argument 143 umc_v8_10_query_ecc_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_query_ecc_error_count() argument 205 umc_v8_10_convert_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst, uint32_t node_inst, uint64_t mc_umc_status) umc_v8_10_convert_error_address() argument 244 umc_v8_10_query_error_address(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_query_error_address() argument 294 umc_v8_10_err_cnt_init_per_channel(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_err_cnt_init_per_channel() argument 335 umc_v8_10_ecc_info_query_correctable_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, unsigned long *error_count) umc_v8_10_ecc_info_query_correctable_error_count() argument 356 umc_v8_10_ecc_info_query_uncorrectable_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, unsigned long *error_count) umc_v8_10_ecc_info_query_uncorrectable_error_count() argument 381 umc_v8_10_ecc_info_query_ecc_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_ecc_info_query_ecc_error_count() argument 403 umc_v8_10_ecc_info_query_error_address(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_ecc_info_query_error_address() argument [all...] |