Searched refs:nbx (Results 1 - 4 of 4) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
H A D | evergreen_cs.c | 172 unsigned nbx; member 194 surf->layer_size = surf->nbx * surf->nby * surf->bpe * surf->nsamples; in evergreen_surface_check_linear() 209 surf->layer_size = surf->nbx * surf->nby * surf->bpe * surf->nsamples; in evergreen_surface_check_linear_aligned() 213 if (surf->nbx & (palign - 1)) { in evergreen_surface_check_linear_aligned() 216 __func__, __LINE__, prefix, surf->nbx, palign); in evergreen_surface_check_linear_aligned() 232 surf->layer_size = surf->nbx * surf->nby * surf->bpe; in evergreen_surface_check_1d() 236 if ((surf->nbx & (palign - 1))) { in evergreen_surface_check_1d() 239 __func__, __LINE__, prefix, surf->nbx, palign, in evergreen_surface_check_1d() 272 mtile_pr = surf->nbx / palign; in evergreen_surface_check_2d() 279 if ((surf->nbx in evergreen_surface_check_2d() 496 evergreen_cs_track_validate_htile(struct radeon_cs_parser *p, unsigned nbx, unsigned nby) evergreen_cs_track_validate_htile() argument [all...] |
H A D | r600_cs.c | 633 unsigned nbx, nby; in r600_cs_track_validate_db() local 646 nbx = pitch; in r600_cs_track_validate_db() 649 /* nbx must be 16 htiles aligned == 16 * 8 pixel aligned */ in r600_cs_track_validate_db() 650 nbx = round_up(nbx, 16 * 8); in r600_cs_track_validate_db() 661 nbx = round_up(nbx, 64 * 8); in r600_cs_track_validate_db() 666 nbx = round_up(nbx, 64 * 8); in r600_cs_track_validate_db() 671 nbx in r600_cs_track_validate_db() 1415 unsigned nbx, nby; r600_texture_size() local [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
H A D | evergreen_cs.c | 171 unsigned nbx; member 193 surf->layer_size = surf->nbx * surf->nby * surf->bpe * surf->nsamples; in evergreen_surface_check_linear() 208 surf->layer_size = surf->nbx * surf->nby * surf->bpe * surf->nsamples; in evergreen_surface_check_linear_aligned() 212 if (surf->nbx & (palign - 1)) { in evergreen_surface_check_linear_aligned() 215 __func__, __LINE__, prefix, surf->nbx, palign); in evergreen_surface_check_linear_aligned() 231 surf->layer_size = surf->nbx * surf->nby * surf->bpe; in evergreen_surface_check_1d() 235 if ((surf->nbx & (palign - 1))) { in evergreen_surface_check_1d() 238 __func__, __LINE__, prefix, surf->nbx, palign, in evergreen_surface_check_1d() 271 mtile_pr = surf->nbx / palign; in evergreen_surface_check_2d() 278 if ((surf->nbx in evergreen_surface_check_2d() 495 evergreen_cs_track_validate_htile(struct radeon_cs_parser *p, unsigned nbx, unsigned nby) evergreen_cs_track_validate_htile() argument [all...] |
H A D | r600_cs.c | 632 unsigned nbx, nby; in r600_cs_track_validate_db() local 645 nbx = pitch; in r600_cs_track_validate_db() 648 /* nbx must be 16 htiles aligned == 16 * 8 pixel aligned */ in r600_cs_track_validate_db() 649 nbx = round_up(nbx, 16 * 8); in r600_cs_track_validate_db() 660 nbx = round_up(nbx, 64 * 8); in r600_cs_track_validate_db() 665 nbx = round_up(nbx, 64 * 8); in r600_cs_track_validate_db() 670 nbx in r600_cs_track_validate_db() 1414 unsigned nbx, nby; r600_texture_size() local [all...] |
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