Searched refs:mxs_lock (Results 1 - 14 of 14) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/mxs/ |
| H A D | clk.h | 17 extern spinlock_t mxs_lock;
43 &mxs_lock); in mxs_clk_gate()
51 reg, shift, width, 0, &mxs_lock); in mxs_clk_mux()
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| H A D | clk-ref.c | 101 spin_lock_irqsave(&mxs_lock, flags); in clk_ref_set_rate()
108 spin_unlock_irqrestore(&mxs_lock, flags); in clk_ref_set_rate()
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| H A D | clk-frac.c | 92 spin_lock_irqsave(&mxs_lock, flags); in clk_frac_set_rate()
99 spin_unlock_irqrestore(&mxs_lock, flags); in clk_frac_set_rate()
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| H A D | clk.c | 12 DEFINE_SPINLOCK(mxs_lock); variable
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| H A D | clk-imx28.c | 229 clks[usb0_phy] = clk_register_gate(NULL, "usb0_phy", "pll0", 0, PLL0CTRL0, 18, 0, &mxs_lock); in mx28_clocks_init()
230 clks[usb1_phy] = clk_register_gate(NULL, "usb1_phy", "pll1", 0, PLL1CTRL0, 18, 0, &mxs_lock); in mx28_clocks_init()
231 clks[enet_out] = clk_register_gate(NULL, "enet_out", "pll2", 0, ENET, 18, 0, &mxs_lock); in mx28_clocks_init()
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| H A D | clk-div.c | 94 div->divider.lock = &mxs_lock; in mxs_clk_div()
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| H A D | clk-imx23.c | 153 clks[usb_phy] = clk_register_gate(NULL, "usb_phy", "pll", 0, PLLCTRL0, 18, 0, &mxs_lock); in mx23_clocks_init()
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| /kernel/linux/linux-6.6/drivers/clk/mxs/ |
| H A D | clk.h | 17 extern spinlock_t mxs_lock;
43 &mxs_lock); in mxs_clk_gate()
51 reg, shift, width, 0, &mxs_lock); in mxs_clk_mux()
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| H A D | clk-ref.c | 101 spin_lock_irqsave(&mxs_lock, flags); in clk_ref_set_rate()
108 spin_unlock_irqrestore(&mxs_lock, flags); in clk_ref_set_rate()
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| H A D | clk-frac.c | 92 spin_lock_irqsave(&mxs_lock, flags); in clk_frac_set_rate()
99 spin_unlock_irqrestore(&mxs_lock, flags); in clk_frac_set_rate()
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| H A D | clk.c | 12 DEFINE_SPINLOCK(mxs_lock); variable
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| H A D | clk-imx28.c | 229 clks[usb0_phy] = clk_register_gate(NULL, "usb0_phy", "pll0", 0, PLL0CTRL0, 18, 0, &mxs_lock); in mx28_clocks_init()
230 clks[usb1_phy] = clk_register_gate(NULL, "usb1_phy", "pll1", 0, PLL1CTRL0, 18, 0, &mxs_lock); in mx28_clocks_init()
231 clks[enet_out] = clk_register_gate(NULL, "enet_out", "pll2", 0, ENET, 18, 0, &mxs_lock); in mx28_clocks_init()
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| H A D | clk-div.c | 94 div->divider.lock = &mxs_lock; in mxs_clk_div()
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| H A D | clk-imx23.c | 153 clks[usb_phy] = clk_register_gate(NULL, "usb_phy", "pll", 0, PLLCTRL0, 18, 0, &mxs_lock); in mx23_clocks_init()
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