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Searched refs:mvpp2_read (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_cls.c329 return mvpp2_read(priv, MVPP2_CLS_FLOW_TBL_HIT_CTR); in mvpp2_cls_flow_hits()
337 fe->data[0] = mvpp2_read(priv, MVPP2_CLS_FLOW_TBL0_REG); in mvpp2_cls_flow_read()
338 fe->data[1] = mvpp2_read(priv, MVPP2_CLS_FLOW_TBL1_REG); in mvpp2_cls_flow_read()
339 fe->data[2] = mvpp2_read(priv, MVPP2_CLS_FLOW_TBL2_REG); in mvpp2_cls_flow_read()
356 return mvpp2_read(priv, MVPP2_CLS_DEC_TBL_HIT_CTR); in mvpp2_cls_lookup_hits()
368 le->data = mvpp2_read(priv, MVPP2_CLS_LKP_TBL_REG); in mvpp2_cls_lookup_read()
501 val = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_INV); in mvpp2_cls_c2_write()
531 c2->tcam[0] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA0); in mvpp2_cls_c2_read()
532 c2->tcam[1] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA1); in mvpp2_cls_c2_read()
533 c2->tcam[2] = mvpp2_read(pri in mvpp2_cls_c2_read()
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H A Dmvpp2_prs.c60 pe->tcam[MVPP2_PRS_TCAM_INV_WORD] = mvpp2_read(priv, in mvpp2_prs_init_from_hw()
66 pe->tcam[i] = mvpp2_read(priv, MVPP2_PRS_TCAM_DATA_REG(i)); in mvpp2_prs_init_from_hw()
71 pe->sram[i] = mvpp2_read(priv, MVPP2_PRS_SRAM_DATA_REG(i)); in mvpp2_prs_init_from_hw()
1106 val = mvpp2_read(priv, MVPP2_PRS_INIT_LOOKUP_REG); in mvpp2_prs_hw_port_init()
1112 val = mvpp2_read(priv, MVPP2_PRS_MAX_LOOP_REG(port)); in mvpp2_prs_hw_port_init()
1120 val = mvpp2_read(priv, MVPP2_PRS_INIT_OFFS_REG(port)); in mvpp2_prs_hw_port_init()
1989 reg_val = mvpp2_read(priv, MVPP2_MH_REG(port->id)); in mvpp2_prs_vid_entry_add()
2097 reg_val = mvpp2_read(priv, MVPP2_MH_REG(port->id)); in mvpp2_prs_vid_enable_filtering()
2527 val = mvpp2_read(priv, MVPP2_PRS_TCAM_HIT_CNT_REG); in mvpp2_prs_hits()
H A Dmvpp2_main.c79 u32 mvpp2_read(struct mvpp2 *priv, u32 offset) in mvpp2_read() function
414 val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id)); in mvpp2_bm_pool_create()
512 buf_num += mvpp2_read(priv, MVPP2_BM_POOL_PTRS_NUM_REG(bm_pool->id)) & in mvpp2_check_hw_buf_num()
514 buf_num += mvpp2_read(priv, MVPP2_BM_BPPI_PTRS_NUM_REG(bm_pool->id)) & in mvpp2_check_hw_buf_num()
542 val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id)); in mvpp2_bm_pool_destroy()
598 val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(pool_id)); in mvpp2_bm_pool_cleanup()
698 val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(prxq)); in mvpp2_rxq_long_pool_set()
719 val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(prxq)); in mvpp2_rxq_short_pool_set()
1561 return mvpp2_read(priv, reg); in mvpp2_read_index()
1740 *pstats++ += mvpp2_read(por in mvpp2_read_stats()
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H A Dmvpp2.h1432 u32 mvpp2_read(struct mvpp2 *priv, u32 offset);
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_cls.c335 return mvpp2_read(priv, MVPP2_CLS_FLOW_TBL_HIT_CTR); in mvpp2_cls_flow_hits()
343 fe->data[0] = mvpp2_read(priv, MVPP2_CLS_FLOW_TBL0_REG); in mvpp2_cls_flow_read()
344 fe->data[1] = mvpp2_read(priv, MVPP2_CLS_FLOW_TBL1_REG); in mvpp2_cls_flow_read()
345 fe->data[2] = mvpp2_read(priv, MVPP2_CLS_FLOW_TBL2_REG); in mvpp2_cls_flow_read()
362 return mvpp2_read(priv, MVPP2_CLS_DEC_TBL_HIT_CTR); in mvpp2_cls_lookup_hits()
374 le->data = mvpp2_read(priv, MVPP2_CLS_LKP_TBL_REG); in mvpp2_cls_lookup_read()
507 val = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_INV); in mvpp2_cls_c2_write()
537 c2->tcam[0] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA0); in mvpp2_cls_c2_read()
538 c2->tcam[1] = mvpp2_read(priv, MVPP22_CLS_C2_TCAM_DATA1); in mvpp2_cls_c2_read()
539 c2->tcam[2] = mvpp2_read(pri in mvpp2_cls_c2_read()
[all...]
H A Dmvpp2_prs.c60 pe->tcam[MVPP2_PRS_TCAM_INV_WORD] = mvpp2_read(priv, in mvpp2_prs_init_from_hw()
66 pe->tcam[i] = mvpp2_read(priv, MVPP2_PRS_TCAM_DATA_REG(i)); in mvpp2_prs_init_from_hw()
71 pe->sram[i] = mvpp2_read(priv, MVPP2_PRS_SRAM_DATA_REG(i)); in mvpp2_prs_init_from_hw()
1108 val = mvpp2_read(priv, MVPP2_PRS_INIT_LOOKUP_REG); in mvpp2_prs_hw_port_init()
1114 val = mvpp2_read(priv, MVPP2_PRS_MAX_LOOP_REG(port)); in mvpp2_prs_hw_port_init()
1122 val = mvpp2_read(priv, MVPP2_PRS_INIT_OFFS_REG(port)); in mvpp2_prs_hw_port_init()
1976 reg_val = mvpp2_read(priv, MVPP2_MH_REG(port->id)); in mvpp2_prs_vid_entry_add()
2084 reg_val = mvpp2_read(priv, MVPP2_MH_REG(port->id)); in mvpp2_prs_vid_enable_filtering()
2514 val = mvpp2_read(priv, MVPP2_PRS_TCAM_HIT_CNT_REG); in mvpp2_prs_hits()
H A Dmvpp2_main.c79 u32 mvpp2_read(struct mvpp2 *priv, u32 offset) in mvpp2_read() function
424 val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id)); in mvpp2_bm_pool_create()
535 buf_num += mvpp2_read(priv, MVPP2_BM_POOL_PTRS_NUM_REG(bm_pool->id)) & in mvpp2_check_hw_buf_num()
537 buf_num += mvpp2_read(priv, MVPP2_BM_BPPI_PTRS_NUM_REG(bm_pool->id)) & in mvpp2_check_hw_buf_num()
565 val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(bm_pool->id)); in mvpp2_bm_pool_destroy()
612 val = mvpp2_read(priv, MVPP22_BM_POOL_BASE_ADDR_HIGH_REG); in mvpp23_bm_set_8pool_mode()
631 val = mvpp2_read(priv, MVPP2_BM_POOL_CTRL_REG(pool_id)); in mvpp2_bm_pool_cleanup()
734 val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(prxq)); in mvpp2_rxq_long_pool_set()
755 val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(prxq)); in mvpp2_rxq_short_pool_set()
1890 return mvpp2_read(pri in mvpp2_read_index()
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H A Dmvpp2.h1528 u32 mvpp2_read(struct mvpp2 *priv, u32 offset);

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