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Searched refs:mux_width (Results 1 - 22 of 22) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/rockchip/
H A Dclk-ddr.c20 int mux_width; member
78 val &= GENMASK(ddrclk->mux_width - 1, 0); in rockchip_ddrclk_get_parent()
93 int mux_shift, int mux_width, in rockchip_clk_register_ddrclk()
128 ddrclk->mux_width = mux_width; in rockchip_clk_register_ddrclk()
90 rockchip_clk_register_ddrclk(const char *name, int flags, const char *const *parent_names, u8 num_parents, int mux_offset, int mux_shift, int mux_width, int div_shift, int div_width, int ddr_flag, void __iomem *reg_base, spinlock_t *lock) rockchip_clk_register_ddrclk() argument
H A Dclk.h370 int mux_shift, int mux_width,
412 u8 mux_width; member
436 .mux_width = mw, \
457 .mux_width = mw, \
516 .mux_width = mw, \
534 .mux_width = mw, \
553 .mux_width = mw, \
624 .mux_width = mw, \
641 .mux_width = w, \
656 .mux_width
[all...]
H A Dclk.c40 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, in rockchip_clk_register_branch()
61 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_branch()
279 frac_mux->mask = BIT(child->mux_width) - 1; in rockchip_clk_register_frac_branch()
458 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
465 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
497 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
516 list->mux_width, list->mux_flags, in rockchip_clk_register_branches()
550 list->mux_width, list->div_shift, in rockchip_clk_register_branches()
37 rockchip_clk_register_branch(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, int div_offset, u8 div_shift, u8 div_width, u8 div_flags, struct clk_div_table *div_table, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) rockchip_clk_register_branch() argument
H A Dclk-half-divider.c162 u8 mux_width, u8 mux_flags, in rockchip_clk_register_halfdiv()
183 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_halfdiv()
158 rockchip_clk_register_halfdiv(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, u8 div_shift, u8 div_width, u8 div_flags, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) rockchip_clk_register_halfdiv() argument
/kernel/linux/linux-6.6/drivers/clk/rockchip/
H A Dclk-ddr.c20 int mux_width; member
78 val &= GENMASK(ddrclk->mux_width - 1, 0); in rockchip_ddrclk_get_parent()
93 int mux_shift, int mux_width, in rockchip_clk_register_ddrclk()
128 ddrclk->mux_width = mux_width; in rockchip_clk_register_ddrclk()
90 rockchip_clk_register_ddrclk(const char *name, int flags, const char *const *parent_names, u8 num_parents, int mux_offset, int mux_shift, int mux_width, int div_shift, int div_width, int ddr_flag, void __iomem *reg_base, spinlock_t *lock) rockchip_clk_register_ddrclk() argument
H A Dclk.c41 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, in rockchip_clk_register_branch()
63 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_branch()
276 frac_mux->mask = BIT(child->mux_width) - 1; in rockchip_clk_register_frac_branch()
451 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
459 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
466 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
498 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
517 list->mux_width, list->mux_flags, in rockchip_clk_register_branches()
552 list->mux_width, list->div_shift, in rockchip_clk_register_branches()
38 rockchip_clk_register_branch(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, u32 *mux_table, int div_offset, u8 div_shift, u8 div_width, u8 div_flags, struct clk_div_table *div_table, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) rockchip_clk_register_branch() argument
H A Dclk.h494 int mux_shift, int mux_width,
536 u8 mux_width; member
561 .mux_width = mw, \
582 .mux_width = mw, \
641 .mux_width = mw, \
659 .mux_width = mw, \
678 .mux_width = mw, \
749 .mux_width = mw, \
766 .mux_width = w, \
781 .mux_width
[all...]
H A Dclk-half-divider.c162 u8 mux_width, u8 mux_flags, in rockchip_clk_register_halfdiv()
183 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_halfdiv()
158 rockchip_clk_register_halfdiv(const char *name, const char *const *parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, u8 div_shift, u8 div_width, u8 div_flags, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) rockchip_clk_register_halfdiv() argument
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mux.h31 u8 mux_width; member
55 .mux_width = _width, \
H A Dclk-mtk.h70 signed char mux_width; member
87 .mux_width = _width, \
123 .mux_width = _width, \
H A Dclk-mux.c66 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_get_parent()
78 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_set_parent_lock()
100 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_set_parent_setclr_lock()
H A Dclk-cpumux.c68 cpumux->mask = BIT(mux->mux_width) - 1; in mtk_clk_register_cpumux()
H A Dclk-mtk.c169 mux->mask = BIT(mc->mux_width) - 1; in mtk_clk_register_composite()
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mtk.h101 signed char mux_width; member
118 .mux_width = _width, \
154 .mux_width = _width, \
H A Dclk-mux.h32 u8 mux_width; member
50 .mux_width = _width, \
H A Dclk-mux.c86 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_get_parent()
98 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_set_parent_setclr_lock()
H A Dclk-cpumux.c81 cpumux->mask = BIT(mux->mux_width) - 1; in mtk_clk_register_cpumux()
H A Dclk-mtk.c237 mux->mask = BIT(mc->mux_width) - 1; in mtk_clk_register_composite()
/kernel/linux/linux-5.10/drivers/clk/x86/
H A Dclk-cgu.h178 u8 mux_width; member
214 .mux_width = _width, \
H A Dclk-cgu.c87 u8 width = list->mux_width; in lgm_clk_register_mux()
/kernel/linux/linux-6.6/drivers/clk/x86/
H A Dclk-cgu.h178 u8 mux_width; member
214 .mux_width = _width, \
H A Dclk-cgu.c87 u8 width = list->mux_width; in lgm_clk_register_mux()

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