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Searched refs:mmVCE_LMI_VCPU_CACHE_40BIT_BAR2 (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_4_0_offset.h166 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR2 0x1098 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_4_0_offset.h166 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR2 0x1098 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v3_0.c50 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR2 0x8618 macro
544 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR2, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()
H A Dvce_v4_0.c277 mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), in vce_v4_0_sriov_start()
643 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), (adev->vce.gpu_addr >> 8)); in vce_v4_0_mc_resume()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v3_0.c50 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR2 0x8618 macro
571 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR2, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()
H A Dvce_v4_0.c278 mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), in vce_v4_0_sriov_start()
679 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), (adev->vce.gpu_addr >> 8)); in vce_v4_0_mc_resume()

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