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Searched refs:mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_4_0_offset.h164 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x1097 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_4_0_offset.h164 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x1097 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v3_0.c49 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x8617 macro
543 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR1, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()
H A Dvce_v4_0.c271 mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), in vce_v4_0_sriov_start()
636 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), (adev->vce.gpu_addr >> 8)); in vce_v4_0_mc_resume()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v3_0.c49 #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x8617 macro
570 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR1, (adev->vce.gpu_addr >> 8)); in vce_v3_0_mc_resume()
H A Dvce_v4_0.c272 mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), in vce_v4_0_sriov_start()
672 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), (adev->vce.gpu_addr >> 8)); in vce_v4_0_mc_resume()

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