| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | smu9_smumgr.c | 153 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); in smu9_send_msg_to_smc_with_parameter()
172 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu9_get_argument()
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| H A D | smu10_smumgr.c | 76 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu10_read_arg_from_smc()
105 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); in smu10_send_msg_to_smc_with_parameter()
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| H A D | vega20_smumgr.c | 140 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); in vega20_send_msg_to_smc_with_parameter()
155 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82); in vega20_get_argument()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | smu9_smumgr.c | 154 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); in smu9_send_msg_to_smc_with_parameter()
173 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu9_get_argument()
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| H A D | smu10_smumgr.c | 76 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu10_read_arg_from_smc()
105 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); in smu10_send_msg_to_smc_with_parameter()
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| H A D | vega20_smumgr.c | 140 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); in vega20_send_msg_to_smc_with_parameter()
155 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82); in vega20_get_argument()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/ |
| H A D | smu_cmn.c | 48 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
84 *arg = RREG32_SOC15_NO_KIQ(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu_cmn_read_arg()
134 WREG32_SOC15_NO_KIQ(MP1, 0, mmMP1_SMN_C2PMSG_82, param); in smu_cmn_send_smc_msg_with_param()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/mp/ |
| H A D | mp_12_0_0_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_10_0_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_9_0_offset.h | 294 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_11_0_offset.h | 284 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/mp/ |
| H A D | mp_10_0_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_12_0_0_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_11_0_offset.h | 284 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_11_0_8_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_11_5_0_offset.h | 282 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| H A D | mp_9_0_offset.h | 294 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_4_ppt.c | 49 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
1131 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu_v13_0_4_set_smu_mailbox_registers()
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| H A D | smu_v13_0.c | 67 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
2408 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu_v13_0_set_smu_mailbox_registers()
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| H A D | smu_v13_0_0_ppt.c | 76 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
2483 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu_v13_0_0_set_smu_mailbox_registers()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 47 #define mmMP1_SMN_C2PMSG_82 0x0292 macro
1475 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82); in renoir_set_ppt_funcs()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | smu_v11_0.c | 2193 smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82); in smu_v11_0_set_smu_mailbox_registers()
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