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Searched refs:mlxsw_reg_write (Results 1 - 25 of 71) sorted by relevance

123

/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_nve_vxlan.c210 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_set()
219 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_clear()
229 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp1_nve_vxlan_rtdp_set()
320 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnpc), tnpc_pl); in mlxsw_sp2_nve_vxlan_learning_set()
332 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl); in mlxsw_sp2_nve_decap_ethertype_set()
357 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_set()
363 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl); in mlxsw_sp2_nve_vxlan_config_set()
376 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl); in mlxsw_sp2_nve_vxlan_config_set()
379 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_set()
394 mlxsw_reg_write(mlxsw_s in mlxsw_sp2_nve_vxlan_config_clear()
[all...]
H A Dspectrum_acl_ctcam.c23 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_ctcam_region_resize()
36 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(prcr), prcr_pl); in mlxsw_sp_acl_ctcam_region_move()
75 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_insert()
96 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_remove()
117 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_action_replace()
H A Dspectrum1_mr_tcam.c57 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_replace()
79 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_remove()
184 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_alloc()
195 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_free()
211 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_parman_resize()
226 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rrcr), rrcr_pl); in mlxsw_sp1_mr_tcam_region_parman_move()
H A Dspectrum_ipip.c180 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp_ipip_nexthop_update_gre4()
219 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp_ipip_decap_config_gre4()
395 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp_ipip_nexthop_update_gre6()
433 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp_ipip_decap_config_gre6()
542 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tieem), tieem_pl); in mlxsw_sp_ipip_ecn_encap_init_one()
573 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tidem), tidem_pl); in mlxsw_sp_ipip_ecn_decap_init_one()
H A Dspectrum.c204 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl); in mlxsw_sp_flow_counter_clear()
356 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); in mlxsw_sp_port_vid_stp_set()
382 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); in mlxsw_sp_port_admin_status_set()
393 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); in mlxsw_sp_port_dev_addr_set()
431 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sp_port_mtu_set()
440 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sp_port_swid_set()
449 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl); in mlxsw_sp_port_vp_mode_set()
464 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl); in mlxsw_sp_port_vid_learning_set()
479 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spfsr), spfsr_pl); in mlxsw_sp_port_security_set()
516 return mlxsw_reg_write(mlxsw_s in mlxsw_sp_port_egress_ethtype_set()
[all...]
H A Dspectrum_dcb.c257 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpts), qpts_pl); in mlxsw_sp_port_dcb_app_update_qpts()
269 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qrwe), qrwe_pl); in mlxsw_sp_port_dcb_app_update_qrwe()
307 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdp), qpdp_pl); in mlxsw_sp_port_dcb_app_update_qpdp()
321 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdpm), qpdpm_pl); in mlxsw_sp_port_dcb_app_update_qpdpm()
335 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdsm), qpdsm_pl); in mlxsw_sp_port_dcb_app_update_qpdsm()
527 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), in mlxsw_sp_port_pfc_set()
H A Dcore_linecards.c162 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_lock()
185 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_component_update()
206 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_block_download()
227 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_component_verify()
247 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_activate()
300 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_cancel()
321 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddt), mddt_pl); in mlxsw_linecard_device_fw_fsm_release()
678 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddc), mddc_pl); in mlxsw_linecard_ready_set()
692 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mddc), mddc_pl); in mlxsw_linecard_ready_clear()
828 return mlxsw_reg_write(linecar in __mlxsw_linecard_fix_fsm_state()
[all...]
H A Dspectrum_acl_erp.c193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_update()
401 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_add()
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_del()
436 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_enable()
454 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_disable()
660 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_add()
677 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_del()
1365 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_init()
1376 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_param_init()
H A Dspectrum_nve.c398 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnumt), tnumt_pl); in mlxsw_sp_nve_mc_record_refresh()
782 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); in mlxsw_sp_nve_fdb_flush_by_fid()
1021 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqdr), tnqdr_pl); in mlxsw_sp_port_nve_init()
1033 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqcr), tnqcr_pl); in mlxsw_sp_nve_qos_init()
1047 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tneem), in mlxsw_sp_nve_ecn_encap_init()
1067 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tndem), tndem_pl); in __mlxsw_sp_nve_ecn_decap_init()
H A Dspectrum2_acl_tcam.c113 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp2_acl_tcam_init()
118 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pgcr), pgcr_pl); in mlxsw_sp2_acl_tcam_init()
H A Dspectrum_ptp.c149 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp_ptp_phc_adjfreq()
179 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtpps), mtpps_pl); in mlxsw_sp1_ptp_phc_settime()
186 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp1_ptp_phc_settime()
369 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp2_ptp_phc_settime()
405 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp2_ptp_adjtime()
878 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtptpt), mtptpt_pl); in mlxsw_sp_ptp_mtptpt_set()
893 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp1_ptp_set_fifo_clr_on_trap()
902 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtpppc), mtpppc_pl); in mlxsw_sp1_ptp_mtpppc_set()
982 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpsc), qpsc_pl); in mlxsw_sp1_ptp_shaper_params_set()
1204 return mlxsw_reg_write(mlxsw_s in mlxsw_sp1_ptp_port_shaper_set()
[all...]
/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_nve_vxlan.c113 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mprs), mprs_pl); in __mlxsw_sp_nve_parsing_set()
201 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_set()
210 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp1_nve_vxlan_config_clear()
220 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp1_nve_vxlan_rtdp_set()
304 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnpc), tnpc_pl); in mlxsw_sp2_nve_vxlan_learning_set()
328 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_set()
346 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl); in mlxsw_sp2_nve_vxlan_config_clear()
360 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp2_nve_vxlan_rtdp_set()
H A Dspectrum_acl_ctcam.c23 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptar), ptar_pl); in mlxsw_sp_acl_ctcam_region_resize()
36 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(prcr), prcr_pl); in mlxsw_sp_acl_ctcam_region_move()
75 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_insert()
96 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_remove()
117 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce2), ptce2_pl); in mlxsw_sp_acl_ctcam_region_entry_action_replace()
H A Dspectrum1_mr_tcam.c57 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_replace()
79 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rmft2), rmft2_pl); in mlxsw_sp1_mr_tcam_route_remove()
184 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_alloc()
195 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_free()
211 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtar), rtar_pl); in mlxsw_sp1_mr_tcam_region_parman_resize()
226 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rrcr), rrcr_pl); in mlxsw_sp1_mr_tcam_region_parman_move()
H A Dspectrum_ipip.c141 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ratr), ratr_pl); in mlxsw_sp_ipip_nexthop_update_gre4()
180 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl); in mlxsw_sp_ipip_fib_entry_op_gre4_rtdp()
194 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ralue), ralue_pl); in mlxsw_sp_ipip_fib_entry_op_gre4_ralue()
350 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tieem), tieem_pl); in mlxsw_sp_ipip_ecn_encap_init_one()
381 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tidem), tidem_pl); in mlxsw_sp_ipip_ecn_decap_init_one()
H A Dspectrum.c198 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl); in mlxsw_sp_flow_counter_clear()
274 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl); in mlxsw_sp_port_vid_stp_set()
300 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); in mlxsw_sp_port_admin_status_set()
311 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); in mlxsw_sp_port_dev_addr_set()
349 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sp_port_mtu_set()
358 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sp_port_swid_set()
367 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl); in mlxsw_sp_port_vp_mode_set()
382 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl); in mlxsw_sp_port_vid_learning_set()
394 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl); in __mlxsw_sp_port_pvid_set()
404 return mlxsw_reg_write(mlxsw_s in mlxsw_sp_port_allow_untagged_set()
[all...]
H A Dswitchib.c128 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(paos), paos_pl); in mlxsw_sib_port_admin_status_set()
149 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(pmtu), pmtu_pl); in mlxsw_sib_port_mtu_set()
160 err = mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(plib), plib_pl); in mlxsw_sib_port_set()
171 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sib_port_swid_set()
198 return mlxsw_reg_write(mlxsw_sib->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sib_port_speed_set()
445 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); in mlxsw_sib_basic_trap_groups_set()
H A Dswitchx2.c167 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(paos), paos_pl); in mlxsw_sx_port_admin_status_set()
205 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(pmtu), pmtu_pl); in __mlxsw_sx_port_mtu_set()
230 err = mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(plib), plib_pl); in mlxsw_sx_port_ib_port_set()
240 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(pspa), pspa_pl); in mlxsw_sx_port_swid_set()
250 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(sspr), sspr_pl); in mlxsw_sx_port_system_port_mapping_set()
833 err = mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sx_port_set_link_ksettings()
916 err = mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(spms), spms_pl); in mlxsw_sx_port_stp_state_set()
929 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sx_port_ib_speed_set()
943 return mlxsw_reg_write(mlxsw_sx->core, MLXSW_REG(ptys), ptys_pl); in mlxsw_sx_port_speed_by_width_set()
954 return mlxsw_reg_write(mlxsw_s in mlxsw_sx_port_mac_learning_mode_set()
[all...]
H A Dspectrum_dcb.c257 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpts), qpts_pl); in mlxsw_sp_port_dcb_app_update_qpts()
269 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qrwe), qrwe_pl); in mlxsw_sp_port_dcb_app_update_qrwe()
307 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdp), qpdp_pl); in mlxsw_sp_port_dcb_app_update_qpdp()
321 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdpm), qpdpm_pl); in mlxsw_sp_port_dcb_app_update_qpdpm()
335 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpdsm), qpdsm_pl); in mlxsw_sp_port_dcb_app_update_qpdsm()
527 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), in mlxsw_sp_port_pfc_set()
H A Dspectrum_acl_erp.c193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_update()
401 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_add()
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perpt), perpt_pl); in mlxsw_sp_acl_erp_table_erp_del()
436 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_enable()
454 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_table_disable()
660 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_add()
677 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_erp_del()
1352 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(percr), percr_pl); in mlxsw_sp_acl_erp_master_mask_init()
1363 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pererp), pererp_pl); in mlxsw_sp_acl_erp_region_param_init()
H A Dspectrum_nve.c388 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnumt), tnumt_pl); in mlxsw_sp_nve_mc_record_refresh()
772 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); in mlxsw_sp_nve_fdb_flush_by_fid()
873 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqdr), tnqdr_pl); in mlxsw_sp_port_nve_init()
885 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnqcr), tnqcr_pl); in mlxsw_sp_nve_qos_init()
899 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tneem), in mlxsw_sp_nve_ecn_encap_init()
919 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tndem), tndem_pl); in __mlxsw_sp_nve_ecn_decap_init()
H A Dspectrum2_acl_tcam.c103 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp2_acl_tcam_init()
108 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pgcr), pgcr_pl); in mlxsw_sp2_acl_tcam_init()
H A Dspectrum_acl_flex_actions.c27 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pefa), pefa_pl); in mlxsw_sp_act_kvdl_set_add()
98 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppbs), ppbs_pl); in mlxsw_sp_act_kvdl_fwd_entry_add()
H A Dspectrum_ptp.c111 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp1_ptp_phc_adjfreq()
141 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtpps), mtpps_pl); in mlxsw_sp1_ptp_phc_settime()
148 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl); in mlxsw_sp1_ptp_phc_settime()
699 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtptpt), mtptpt_pl); in mlxsw_sp_ptp_mtptpt_set()
714 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl); in mlxsw_sp1_ptp_set_fifo_clr_on_trap()
723 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtpppc), mtpppc_pl); in mlxsw_sp1_ptp_mtpppc_set()
803 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpsc), qpsc_pl); in mlxsw_sp1_ptp_shaper_params_set()
1003 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); in mlxsw_sp1_ptp_port_shaper_set()
H A Dspectrum_acl_atcam.c287 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(perar), perar_pl); in mlxsw_sp_acl_atcam_region_associate()
408 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_insert()
437 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_remove()
466 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptce3), ptce3_pl); in mlxsw_sp_acl_atcam_region_entry_action_replace()

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