min_active_dram_clock_change_margin (reference) in projects: kernel - OpenGrok search results

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Searched refs:min_active_dram_clock_change_margin (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/
H A D	dcn_calcs.h	`535 float min_active_dram_clock_change_margin; member`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/
H A D	dcn_calcs.h	`535 float min_active_dram_clock_change_margin; member`
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/
H A D	dcn_calc_auto.c	1884 v->min_active_dram_clock_change_margin = 999999.0; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1888 if (v->active_dram_clock_change_latency_margin[k] < v->min_active_dram_clock_change_margin) { in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1889 v->second_min_active_dram_clock_change_margin = v->min_active_dram_clock_change_margin; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1890 v->min_active_dram_clock_change_margin = v->active_dram_clock_change_latency_margin[k]; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1904 v->dram_clock_change_margin =dcn_bw_max2(v->min_active_dram_clock_change_margin, v->min_vblank_dram_clock_change_margin); in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1906 else if (v->v_blank_of_min_active_dram_clock_change_margin > v->min_active_dram_clock_change_margin) { in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1910 v->dram_clock_change_margin = v->min_active_dram_clock_change_margin; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1912 if (v->min_active_dram_clock_change_margin > 0.0) { in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A D	dcn_calc_auto.c	1884 v->min_active_dram_clock_change_margin = 999999.0; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1888 if (v->active_dram_clock_change_latency_margin[k] < v->min_active_dram_clock_change_margin) { in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1889 v->second_min_active_dram_clock_change_margin = v->min_active_dram_clock_change_margin; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1890 v->min_active_dram_clock_change_margin = v->active_dram_clock_change_latency_margin[k]; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1904 v->dram_clock_change_margin =dcn_bw_max2(v->min_active_dram_clock_change_margin, v->min_vblank_dram_clock_change_margin); in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1906 else if (v->v_blank_of_min_active_dram_clock_change_margin > v->min_active_dram_clock_change_margin) { in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1910 v->dram_clock_change_margin = v->min_active_dram_clock_change_margin; in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation() 1912 if (v->min_active_dram_clock_change_margin > 0.0) { in dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation()

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