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Searched refs:midr (Results 1 - 25 of 29) sorted by relevance

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/kernel/linux/linux-5.10/arch/arm64/include/asm/
H A Dcputype.h25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK)
28 #define MIDR_PARTNUM(midr) \
29 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
32 #define MIDR_ARCHITECTURE(midr) \
33 (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
36 #define MIDR_VARIANT(midr) \
37 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
40 #define MIDR_IMPLEMENTOR(midr) \
41 (((midr)
198 midr_is_cpu_model_range(u32 midr, u32 model, u32 rv_min, u32 rv_max) midr_is_cpu_model_range() argument
207 is_midr_in_range(u32 midr, struct midr_range const *range) is_midr_in_range() argument
214 is_midr_in_range_list(u32 midr, struct midr_range const *ranges) is_midr_in_range_list() argument
[all...]
/kernel/linux/linux-6.6/arch/arm64/include/asm/
H A Dcputype.h25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK)
28 #define MIDR_PARTNUM(midr) \
29 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
32 #define MIDR_ARCHITECTURE(midr) \
33 (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
36 #define MIDR_VARIANT(midr) \
37 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
40 #define MIDR_IMPLEMENTOR(midr) \
41 (((midr)
238 midr_is_cpu_model_range(u32 midr, u32 model, u32 rv_min, u32 rv_max) midr_is_cpu_model_range() argument
247 is_midr_in_range(u32 midr, struct midr_range const *range) is_midr_in_range() argument
254 is_midr_in_range_list(u32 midr, struct midr_range const *ranges) is_midr_in_range_list() argument
[all...]
/kernel/linux/linux-6.6/tools/arch/arm64/include/asm/
H A Dcputype.h25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK)
28 #define MIDR_PARTNUM(midr) \
29 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
32 #define MIDR_ARCHITECTURE(midr) \
33 (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
36 #define MIDR_VARIANT(midr) \
37 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
40 #define MIDR_IMPLEMENTOR(midr) \
41 (((midr)
231 midr_is_cpu_model_range(u32 midr, u32 model, u32 rv_min, u32 rv_max) midr_is_cpu_model_range() argument
240 is_midr_in_range(u32 midr, struct midr_range const *range) is_midr_in_range() argument
247 is_midr_in_range_list(u32 midr, struct midr_range const *ranges) is_midr_in_range_list() argument
[all...]
/kernel/linux/linux-5.10/arch/arm/kernel/
H A Dsmp_tlb.c96 unsigned int midr = read_cpuid_id(); in erratum_a15_798181_init() local
125 if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) { in erratum_a15_798181_init()
127 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) { in erratum_a15_798181_init()
129 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) { in erratum_a15_798181_init()
136 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) { in erratum_a15_798181_init()
143 } else if ((midr in erratum_a15_798181_init()
[all...]
H A Dsetup.c679 struct proc_info_list *lookup_processor(u32 midr) in lookup_processor() argument
681 struct proc_info_list *list = lookup_processor_type(midr); in lookup_processor()
685 smp_processor_id(), midr); in lookup_processor()
695 unsigned int midr = read_cpuid_id(); in setup_processor() local
696 struct proc_info_list *list = lookup_processor(midr); in setup_processor()
713 list->cpu_name, midr, midr & 15, in setup_processor()
/kernel/linux/linux-6.6/arch/arm/kernel/
H A Dsmp_tlb.c96 unsigned int midr = read_cpuid_id(); in erratum_a15_798181_init() local
125 if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) { in erratum_a15_798181_init()
127 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) { in erratum_a15_798181_init()
129 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) { in erratum_a15_798181_init()
136 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) { in erratum_a15_798181_init()
143 } else if ((midr in erratum_a15_798181_init()
[all...]
H A Dsetup.c686 struct proc_info_list *lookup_processor(u32 midr) in lookup_processor() argument
688 struct proc_info_list *list = lookup_processor_type(midr); in lookup_processor()
692 smp_processor_id(), midr); in lookup_processor()
702 unsigned int midr = read_cpuid_id(); in setup_processor() local
703 struct proc_info_list *list = lookup_processor(midr); in setup_processor()
720 list->cpu_name, midr, midr & 15, in setup_processor()
/kernel/linux/linux-5.10/tools/perf/arch/arm64/util/
H A Dheader.c20 u64 midr = 0; in _get_cpuid() local
50 midr = strtoul(buf, NULL, 16); in _get_cpuid()
51 midr &= (~(MIDR_VARIANT_MASK | MIDR_REVISION_MASK)); in _get_cpuid()
52 scnprintf(buf, MIDR_SIZE, "0x%016lx", midr); in _get_cpuid()
53 /* got midr break loop */ in _get_cpuid()
59 if (!midr) in _get_cpuid()
92 /* read midr from list of cpus mapped to this pmu */ in get_cpuid_str()
/kernel/linux/linux-5.10/arch/arm64/kernel/
H A Dcpu_errata.c21 u32 midr = read_cpuid_id(), revidr; in is_affected_midr_range() local
24 if (!is_midr_in_range(midr, &entry->midr_range)) in is_affected_midr_range()
27 midr &= MIDR_REVISION_MASK | MIDR_VARIANT_MASK; in is_affected_midr_range()
30 if (midr == fix->midr_rv && (revidr & fix->revidr_mask)) in is_affected_midr_range()
158 /* Errata affecting a list of midr ranges, with same work around */
191 u32 midr = read_cpuid_id(); in has_neoverse_n1_erratum_1542419() local
196 return is_midr_in_range(midr, &range) && has_dic; in has_neoverse_n1_erratum_1542419()
H A Dcpuinfo.c146 u32 midr = cpuinfo->reg_midr; in c_show() local
156 MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); in c_show()
196 MIDR_IMPLEMENTOR(midr)); in c_show()
198 seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr)); in c_show()
199 seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr)); in c_show()
200 seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr)); in c_show()
258 CPUREGS_ATTR_RO(midr_el1, midr);
H A Dproton-pack.c306 u32 midr = read_cpuid_id(); in spectre_v2_get_sw_mitigation_cb() local
307 if (((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR) && in spectre_v2_get_sw_mitigation_cb()
308 ((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR_V1)) in spectre_v2_get_sw_mitigation_cb()
/kernel/linux/linux-6.6/arch/arm64/kernel/
H A Dcpuinfo.c184 u32 midr = cpuinfo->reg_midr; in c_show() local
194 MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); in c_show()
234 MIDR_IMPLEMENTOR(midr)); in c_show()
236 seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr)); in c_show()
237 seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr)); in c_show()
238 seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr)); in c_show()
296 CPUREGS_ATTR_RO(midr_el1, midr);
H A Dcpu_errata.c21 u32 midr = read_cpuid_id(), revidr; in is_affected_midr_range() local
24 if (!is_midr_in_range(midr, &entry->midr_range)) in is_affected_midr_range()
27 midr &= MIDR_REVISION_MASK | MIDR_VARIANT_MASK; in is_affected_midr_range()
30 if (midr == fix->midr_rv && (revidr & fix->revidr_mask)) in is_affected_midr_range()
172 /* Errata affecting a list of midr ranges, with same work around */
205 u32 midr = read_cpuid_id(); in has_neoverse_n1_erratum_1542419() local
210 return is_midr_in_range(midr, &range) && has_dic; in has_neoverse_n1_erratum_1542419()
H A Dproton-pack.c263 u32 midr = read_cpuid_id(); in spectre_v2_get_sw_mitigation_cb() local
264 if (((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR) && in spectre_v2_get_sw_mitigation_cb()
265 ((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR_V1)) in spectre_v2_get_sw_mitigation_cb()
/kernel/liteos_a/arch/arm/include/
H A Dlos_hw.h171 UINT32 midr = OsMainIDGet(); in LOS_CpuInfo() local
173 UINT32 partNo = (midr & 0xFFF0) >> 0x4; in LOS_CpuInfo()
/kernel/linux/linux-5.10/include/ras/
H A Dras_event.h179 __field(u64, midr)
194 __entry->midr = proc->midr;
206 __entry->affinity, __entry->mpidr, __entry->midr,
/kernel/linux/linux-6.6/include/ras/
H A Dras_event.h179 __field(u64, midr)
194 __entry->midr = proc->midr;
206 __entry->affinity, __entry->mpidr, __entry->midr,
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu.h622 * bits 7..4: midr id
635 u8 midr = pdev->revision & 0xF0; in is_rvu_otx2() local
637 return (midr == PCI_REVISION_ID_96XX || midr == PCI_REVISION_ID_95XX || in is_rvu_otx2()
638 midr == PCI_REVISION_ID_95XXN || midr == PCI_REVISION_ID_98XX || in is_rvu_otx2()
639 midr == PCI_REVISION_ID_95XXMM || midr == PCI_REVISION_ID_95XXO); in is_rvu_otx2()
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_common.h556 * bits 7..4: midr id
567 u8 midr = pdev->revision & 0xF0; in is_dev_otx2() local
569 return (midr == PCI_REVISION_ID_96XX || midr == PCI_REVISION_ID_95XX || in is_dev_otx2()
570 midr == PCI_REVISION_ID_95XXN || midr == PCI_REVISION_ID_98XX || in is_dev_otx2()
571 midr == PCI_REVISION_ID_95XXMM || midr == PCI_REVISION_ID_95XXO); in is_dev_otx2()
/kernel/linux/linux-6.6/tools/perf/util/
H A Darm-spe.c49 u64 midr; member
518 static u64 arm_spe__synth_data_source(const struct arm_spe_record *record, u64 midr) in arm_spe__synth_data_source() argument
521 bool is_neoverse = is_midr_in_range_list(midr, neoverse_spe); in arm_spe__synth_data_source()
554 data_src = arm_spe__synth_data_source(record, spe->midr); in arm_spe_sample()
1297 u64 midr = strtol(cpuid, NULL, 16); in arm_spe_process_auxtrace_info() local
1317 spe->midr = midr; in arm_spe_process_auxtrace_info()
/kernel/linux/linux-5.10/arch/c6x/platforms/
H A Demif.c17 u32 midr; member
/kernel/linux/linux-5.10/arch/arm/include/asm/
H A Dcputype.h114 struct proc_info_list *lookup_processor(u32 midr);
/kernel/linux/linux-6.6/arch/arm/include/asm/
H A Dcputype.h118 struct proc_info_list *lookup_processor(u32 midr);
/kernel/linux/linux-5.10/drivers/firmware/efi/
H A Dcper-arm.c246 printk("%sMIDR: 0x%016llx\n", pfx, proc->midr); in cper_print_proc_arm()
/kernel/linux/linux-6.6/drivers/firmware/efi/
H A Dcper-arm.c245 printk("%sMIDR: 0x%016llx\n", pfx, proc->midr); in cper_print_proc_arm()

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