| /kernel/linux/linux-6.6/sound/hda/ |
| H A D | intel-nhlt.c | 176 int mclk_mask = 0; in intel_nhlt_ssp_mclk_mask() local
223 mclk_mask |= blob[mdivc_offset] & GENMASK(1, 0); in intel_nhlt_ssp_mclk_mask()
232 if (hweight_long(mclk_mask) != 1) in intel_nhlt_ssp_mclk_mask()
235 return mclk_mask; in intel_nhlt_ssp_mclk_mask()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 217 uint32_t *mclk_mask, in renoir_get_profiling_clk_mask()
225 if (mclk_mask) in renoir_get_profiling_clk_mask()
227 *mclk_mask = NUM_MEMCLK_DPM_LEVELS - 1; in renoir_get_profiling_clk_mask()
233 if(mclk_mask) in renoir_get_profiling_clk_mask()
235 *mclk_mask = 0; in renoir_get_profiling_clk_mask()
250 uint32_t mclk_mask, soc_mask; in renoir_get_dpm_ultimate_freq() local
284 &mclk_mask, in renoir_get_dpm_ultimate_freq()
301 ret = renoir_get_dpm_clk_limited(smu, clk_type, mclk_mask, max); in renoir_get_dpm_ultimate_freq()
828 uint32_t sclk_mask, mclk_mask, soc_mask; in renoir_set_performance_level() local
895 &mclk_mask, in renoir_set_performance_level()
214 renoir_get_profiling_clk_mask(struct smu_context *smu, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) renoir_get_profiling_clk_mask() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 253 uint32_t *mclk_mask, in renoir_get_profiling_clk_mask()
261 if (mclk_mask) in renoir_get_profiling_clk_mask()
263 *mclk_mask = NUM_MEMCLK_DPM_LEVELS - 1; in renoir_get_profiling_clk_mask()
269 if (mclk_mask) in renoir_get_profiling_clk_mask()
271 *mclk_mask = 0; in renoir_get_profiling_clk_mask()
286 uint32_t mclk_mask, soc_mask; in renoir_get_dpm_ultimate_freq() local
320 &mclk_mask, in renoir_get_dpm_ultimate_freq()
337 ret = renoir_get_dpm_clk_limited(smu, clk_type, mclk_mask, max); in renoir_get_dpm_ultimate_freq()
935 uint32_t sclk_mask, mclk_mask, soc_mask; in renoir_set_performance_level() local
1017 &mclk_mask, in renoir_set_performance_level()
250 renoir_get_profiling_clk_mask(struct smu_context *smu, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) renoir_get_profiling_clk_mask() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | vangogh_ppt.c | 838 uint32_t *mclk_mask, in vangogh_get_profiling_clk_mask()
845 if (mclk_mask) in vangogh_get_profiling_clk_mask()
846 *mclk_mask = clk_table->NumDfPstatesEnabled - 1; in vangogh_get_profiling_clk_mask()
854 if (mclk_mask) in vangogh_get_profiling_clk_mask()
855 *mclk_mask = 0; in vangogh_get_profiling_clk_mask()
869 if (mclk_mask) in vangogh_get_profiling_clk_mask()
870 *mclk_mask = 0; in vangogh_get_profiling_clk_mask()
929 uint32_t mclk_mask; in vangogh_get_dpm_ultimate_freq() local
973 &mclk_mask, in vangogh_get_dpm_ultimate_freq()
982 ret = vangogh_get_dpm_clk_limited(smu, clk_type, mclk_mask, ma in vangogh_get_dpm_ultimate_freq()
834 vangogh_get_profiling_clk_mask(struct smu_context *smu, enum amd_dpm_forced_level level, uint32_t *vclk_mask, uint32_t *dclk_mask, uint32_t *mclk_mask, uint32_t *fclk_mask, uint32_t *soc_mask) vangogh_get_profiling_clk_mask() argument
1413 uint32_t soc_mask, mclk_mask, fclk_mask; vangogh_set_performance_level() local
[all...] |
| /kernel/linux/linux-6.6/sound/soc/sof/intel/ |
| H A D | hda.c | 1660 int mclk_mask; in hda_machine_select() local
1686 mclk_mask = check_nhlt_ssp_mclk_mask(sdev, ssp_num); in hda_machine_select()
1688 if (mclk_mask < 0) { in hda_machine_select()
1693 dev_dbg(sdev->dev, "MCLK mask %#x found in NHLT\n", mclk_mask); in hda_machine_select()
1695 if (mclk_mask) { in hda_machine_select()
1696 dev_info(sdev->dev, "Overriding topology with MCLK mask %#x from NHLT\n", mclk_mask); in hda_machine_select()
1698 sdev->mclk_id_quirk = (mclk_mask & BIT(0)) ? 0 : 1; in hda_machine_select()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | vega12_hwmgr.c | 1698 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega12_get_profiling_clk_mask()
1706 *mclk_mask = 0; in vega12_get_profiling_clk_mask()
1713 *mclk_mask = VEGA12_UMD_PSTATE_MCLK_LEVEL; in vega12_get_profiling_clk_mask()
1720 *mclk_mask = 0; in vega12_get_profiling_clk_mask()
1723 *mclk_mask = mem_dpm_table->count - 1; in vega12_get_profiling_clk_mask()
1753 uint32_t mclk_mask = 0; in vega12_dpm_force_dpm_level() local
1770 ret = vega12_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega12_dpm_force_dpm_level()
1774 vega12_force_clock_level(hwmgr, PP_MCLK, 1 << mclk_mask); in vega12_dpm_force_dpm_level()
1697 vega12_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) vega12_get_profiling_clk_mask() argument
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| H A D | smu7_hwmgr.c | 2826 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *pcie_mask) in smu7_get_profiling_clk()
2844 *mclk_mask = golden_dpm_table->mclk_table.count - 1; in smu7_get_profiling_clk()
2847 *mclk_mask = golden_dpm_table->mclk_table.count - 2; in smu7_get_profiling_clk()
2889 *mclk_mask = 0; in smu7_get_profiling_clk()
2891 *mclk_mask = golden_dpm_table->mclk_table.count - 1; in smu7_get_profiling_clk()
2905 uint32_t mclk_mask = 0; in smu7_force_dpm_level() local
2909 smu7_get_profiling_clk(hwmgr, level, &sclk_mask, &mclk_mask, &pcie_mask); in smu7_force_dpm_level()
2925 ret = smu7_get_profiling_clk(hwmgr, level, &sclk_mask, &mclk_mask, &pcie_mask); in smu7_force_dpm_level()
2929 smu7_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask); in smu7_force_dpm_level()
2825 smu7_get_profiling_clk(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *pcie_mask) smu7_get_profiling_clk() argument
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| H A D | vega20_hwmgr.c | 2523 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega20_get_profiling_clk_mask()
2531 *mclk_mask = 0; in vega20_get_profiling_clk_mask()
2538 *mclk_mask = VEGA20_UMD_PSTATE_MCLK_LEVEL; in vega20_get_profiling_clk_mask()
2545 *mclk_mask = 0; in vega20_get_profiling_clk_mask()
2548 *mclk_mask = mem_dpm_table->count - 1; in vega20_get_profiling_clk_mask()
2723 uint32_t sclk_mask, mclk_mask, soc_mask; in vega20_dpm_force_dpm_level() local
2742 ret = vega20_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega20_dpm_force_dpm_level()
2746 vega20_force_clock_level(hwmgr, PP_MCLK, 1 << mclk_mask); in vega20_dpm_force_dpm_level()
2522 vega20_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) vega20_get_profiling_clk_mask() argument
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| H A D | vega10_hwmgr.c | 4156 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega10_get_profiling_clk_mask()
4166 *mclk_mask = VEGA10_UMD_PSTATE_MCLK_LEVEL; in vega10_get_profiling_clk_mask()
4174 *mclk_mask = 0; in vega10_get_profiling_clk_mask()
4184 *mclk_mask = table_info->vdd_dep_on_mclk->count - 1; in vega10_get_profiling_clk_mask()
4276 uint32_t mclk_mask = 0; in vega10_dpm_force_dpm_level() local
4280 vega10_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega10_dpm_force_dpm_level()
4296 ret = vega10_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega10_dpm_force_dpm_level()
4300 vega10_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask); in vega10_dpm_force_dpm_level()
4155 vega10_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) vega10_get_profiling_clk_mask() argument
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | vega12_hwmgr.c | 1718 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega12_get_profiling_clk_mask()
1726 *mclk_mask = 0; in vega12_get_profiling_clk_mask()
1733 *mclk_mask = VEGA12_UMD_PSTATE_MCLK_LEVEL; in vega12_get_profiling_clk_mask()
1740 *mclk_mask = 0; in vega12_get_profiling_clk_mask()
1743 *mclk_mask = mem_dpm_table->count - 1; in vega12_get_profiling_clk_mask()
1773 uint32_t mclk_mask = 0; in vega12_dpm_force_dpm_level() local
1790 ret = vega12_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega12_dpm_force_dpm_level()
1794 vega12_force_clock_level(hwmgr, PP_MCLK, 1 << mclk_mask); in vega12_dpm_force_dpm_level()
1717 vega12_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) vega12_get_profiling_clk_mask() argument
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| H A D | vega20_hwmgr.c | 2523 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega20_get_profiling_clk_mask()
2531 *mclk_mask = 0; in vega20_get_profiling_clk_mask()
2538 *mclk_mask = VEGA20_UMD_PSTATE_MCLK_LEVEL; in vega20_get_profiling_clk_mask()
2545 *mclk_mask = 0; in vega20_get_profiling_clk_mask()
2548 *mclk_mask = mem_dpm_table->count - 1; in vega20_get_profiling_clk_mask()
2723 uint32_t sclk_mask, mclk_mask, soc_mask; in vega20_dpm_force_dpm_level() local
2742 ret = vega20_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega20_dpm_force_dpm_level()
2746 vega20_force_clock_level(hwmgr, PP_MCLK, 1 << mclk_mask); in vega20_dpm_force_dpm_level()
2522 vega20_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) vega20_get_profiling_clk_mask() argument
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| H A D | smu7_hwmgr.c | 3170 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *pcie_mask) in smu7_get_profiling_clk()
3188 *mclk_mask = golden_dpm_table->mclk_table.count - 1; in smu7_get_profiling_clk()
3191 *mclk_mask = golden_dpm_table->mclk_table.count - 2; in smu7_get_profiling_clk()
3227 *mclk_mask = 0; in smu7_get_profiling_clk()
3229 *mclk_mask = golden_dpm_table->mclk_table.count - 1; in smu7_get_profiling_clk()
3241 uint32_t mclk_mask = 0; in smu7_force_dpm_level() local
3258 ret = smu7_get_profiling_clk(hwmgr, level, &sclk_mask, &mclk_mask, &pcie_mask); in smu7_force_dpm_level()
3262 smu7_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask); in smu7_force_dpm_level()
3169 smu7_get_profiling_clk(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *pcie_mask) smu7_get_profiling_clk() argument
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| H A D | vega10_hwmgr.c | 4183 uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) in vega10_get_profiling_clk_mask()
4193 *mclk_mask = VEGA10_UMD_PSTATE_MCLK_LEVEL; in vega10_get_profiling_clk_mask()
4199 *mclk_mask = 0; in vega10_get_profiling_clk_mask()
4209 *mclk_mask = table_info->vdd_dep_on_mclk->count - 1; in vega10_get_profiling_clk_mask()
4301 uint32_t mclk_mask = 0; in vega10_dpm_force_dpm_level() local
4318 ret = vega10_get_profiling_clk_mask(hwmgr, level, &sclk_mask, &mclk_mask, &soc_mask); in vega10_dpm_force_dpm_level()
4322 vega10_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask); in vega10_dpm_force_dpm_level()
4182 vega10_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) vega10_get_profiling_clk_mask() argument
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