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Searched refs:mc_umc_status (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v6_7.c61 uint64_t mc_umc_status, uint32_t umc_reg_offset) in umc_v6_7_query_error_status_helper()
66 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1) in umc_v6_7_query_error_status_helper()
69 if (mc_umc_status) in umc_v6_7_query_error_status_helper()
70 dev_info(adev->dev, "MCA STATUS 0x%llx, umc_reg_offset 0x%x\n", mc_umc_status, umc_reg_offset); in umc_v6_7_query_error_status_helper()
98 uint64_t mc_umc_status; in umc_v6_7_ecc_info_query_correctable_error_count() local
109 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status; in umc_v6_7_ecc_info_query_correctable_error_count()
110 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v6_7_ecc_info_query_correctable_error_count()
111 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) { in umc_v6_7_ecc_info_query_correctable_error_count()
114 umc_v6_7_query_error_status_helper(adev, mc_umc_status, umc_reg_offset); in umc_v6_7_ecc_info_query_correctable_error_count()
140 uint64_t mc_umc_status; in umc_v6_7_ecc_info_querry_uncorrectable_error_count() local
60 umc_v6_7_query_error_status_helper(struct amdgpu_device *adev, uint64_t mc_umc_status, uint32_t umc_reg_offset) umc_v6_7_query_error_status_helper() argument
226 uint64_t mc_umc_status, err_addr; umc_v6_7_ecc_info_query_error_address() local
269 uint64_t mc_umc_status; umc_v6_7_query_correctable_error_count() local
341 uint64_t mc_umc_status; umc_v6_7_querry_uncorrectable_error_count() local
446 uint64_t mc_umc_status = 0, mc_umc_addrt0, err_addr; umc_v6_7_query_error_address() local
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H A Dumc_v8_10.c107 uint64_t mc_umc_status; in umc_v8_10_query_correctable_error_count() local
117 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_10_query_correctable_error_count()
118 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_10_query_correctable_error_count()
119 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v8_10_query_correctable_error_count()
127 uint64_t mc_umc_status; in umc_v8_10_query_uncorrectable_error_count() local
133 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_10_query_uncorrectable_error_count()
134 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v8_10_query_uncorrectable_error_count()
135 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v8_10_query_uncorrectable_error_count()
136 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 || in umc_v8_10_query_uncorrectable_error_count()
137 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST in umc_v8_10_query_uncorrectable_error_count()
205 umc_v8_10_convert_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst, uint32_t node_inst, uint64_t mc_umc_status) umc_v8_10_convert_error_address() argument
249 uint64_t mc_umc_status, err_addr; umc_v8_10_query_error_address() local
339 uint64_t mc_umc_status; umc_v8_10_ecc_info_query_correctable_error_count() local
360 uint64_t mc_umc_status; umc_v8_10_ecc_info_query_uncorrectable_error_count() local
408 uint64_t mc_umc_status, err_addr; umc_v8_10_ecc_info_query_error_address() local
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H A Dumc_v8_7.c54 uint64_t mc_umc_status; in umc_v8_7_ecc_info_query_correctable_error_count() local
63 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status; in umc_v8_7_ecc_info_query_correctable_error_count()
64 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_7_ecc_info_query_correctable_error_count()
65 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v8_7_ecc_info_query_correctable_error_count()
73 uint64_t mc_umc_status; in umc_v8_7_ecc_info_querry_uncorrectable_error_count() local
80 mc_umc_status = ras->umc_ecc.ecc[eccinfo_table_idx].mca_umc_status; in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
81 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
82 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
83 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, UECC) == 1 || in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
84 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
135 uint64_t mc_umc_status, err_addr; umc_v8_7_ecc_info_query_error_address() local
240 uint64_t mc_umc_status; umc_v8_7_query_correctable_error_count() local
285 uint64_t mc_umc_status; umc_v8_7_querry_uncorrectable_error_count() local
333 uint64_t mc_umc_status, err_addr, mc_umc_addrt0; umc_v8_7_query_error_address() local
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H A Dumc_v6_1.c175 uint64_t mc_umc_status; in umc_v6_1_query_correctable_error_count() local
219 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_query_correctable_error_count()
220 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 && in umc_v6_1_query_correctable_error_count()
221 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v6_1_query_correctable_error_count()
222 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v6_1_query_correctable_error_count()
230 uint64_t mc_umc_status; in umc_v6_1_querry_uncorrectable_error_count() local
244 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_querry_uncorrectable_error_count()
245 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v6_1_querry_uncorrectable_error_count()
246 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v6_1_querry_uncorrectable_error_count()
247 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST in umc_v6_1_querry_uncorrectable_error_count()
302 uint64_t mc_umc_status, err_addr, retired_page, mc_umc_addrt0; umc_v6_1_query_error_address() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dumc_v8_7.c109 uint64_t mc_umc_status; in umc_v8_7_query_correctable_error_count() local
143 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_7_query_correctable_error_count()
144 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 && in umc_v8_7_query_correctable_error_count()
145 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v8_7_query_correctable_error_count()
146 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v8_7_query_correctable_error_count()
154 uint64_t mc_umc_status; in umc_v8_7_querry_uncorrectable_error_count() local
160 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_7_querry_uncorrectable_error_count()
161 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v8_7_querry_uncorrectable_error_count()
162 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v8_7_querry_uncorrectable_error_count()
163 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST in umc_v8_7_querry_uncorrectable_error_count()
202 uint64_t mc_umc_status, err_addr, retired_page, mc_umc_addrt0; umc_v8_7_query_error_address() local
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H A Dumc_v6_1.c174 uint64_t mc_umc_status; in umc_v6_1_query_correctable_error_count() local
218 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_query_correctable_error_count()
219 if (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, ErrorCodeExt) == 6 && in umc_v6_1_query_correctable_error_count()
220 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1 && in umc_v6_1_query_correctable_error_count()
221 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, CECC) == 1) in umc_v6_1_query_correctable_error_count()
229 uint64_t mc_umc_status; in umc_v6_1_querry_uncorrectable_error_count() local
243 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_querry_uncorrectable_error_count()
244 if ((REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Val) == 1) && in umc_v6_1_querry_uncorrectable_error_count()
245 (REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, Deferred) == 1 || in umc_v6_1_querry_uncorrectable_error_count()
246 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST in umc_v6_1_querry_uncorrectable_error_count()
301 uint64_t mc_umc_status, err_addr, retired_page, mc_umc_addrt0; umc_v6_1_query_error_address() local
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