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Searched refs:max_limits (Results 1 - 24 of 24) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Dbtc_dpm.c1270 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations()
1283 max_limits->sclk, in btc_adjust_clock_combinations()
1290 max_limits->mclk, in btc_adjust_clock_combinations()
2099 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local
2111 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()
2113 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()
2116 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()
2117 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()
2118 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()
2119 ps->high.sclk = max_limits in btc_apply_state_adjust_rules()
1269 btc_adjust_clock_combinations(struct radeon_device *rdev, const struct radeon_clock_and_voltage_limits *max_limits, struct rv7xx_pl *pl) btc_adjust_clock_combinations() argument
[all...]
H A Dbtc_dpm.h48 const struct radeon_clock_and_voltage_limits *max_limits,
H A Dni_dpm.c790 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local
803 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
805 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
809 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()
810 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()
811 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()
812 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()
813 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()
814 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()
815 if (ps->performance_levels[i].vddci > max_limits in ni_apply_state_adjust_rules()
[all...]
H A Dci_dpm.c785 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local
810 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()
812 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()
816 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()
817 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()
818 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()
819 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()
3919 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local
3923 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()
3925 max_limits in ci_enable_uvd_dpm()
3968 const struct radeon_clock_and_voltage_limits *max_limits; ci_enable_vce_dpm() local
[all...]
H A Dsi_dpm.c2953 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
3010 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
3012 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
3020 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3021 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3022 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3023 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()
3024 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()
3025 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()
3026 if (ps->performance_levels[i].vddci > max_limits in si_apply_state_adjust_rules()
[all...]
H A Dkv_dpm.c2151 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
2162 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
2166 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2285 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2287 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Dbtc_dpm.c1268 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations()
1281 max_limits->sclk, in btc_adjust_clock_combinations()
1288 max_limits->mclk, in btc_adjust_clock_combinations()
2097 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local
2109 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()
2111 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()
2114 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()
2115 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()
2116 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()
2117 ps->high.sclk = max_limits in btc_apply_state_adjust_rules()
1267 btc_adjust_clock_combinations(struct radeon_device *rdev, const struct radeon_clock_and_voltage_limits *max_limits, struct rv7xx_pl *pl) btc_adjust_clock_combinations() argument
[all...]
H A Dbtc_dpm.h48 const struct radeon_clock_and_voltage_limits *max_limits,
H A Dni_dpm.c789 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local
802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()
809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()
810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()
811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()
812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()
813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()
814 if (ps->performance_levels[i].vddci > max_limits in ni_apply_state_adjust_rules()
[all...]
H A Dci_dpm.c775 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local
800 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()
802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()
806 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()
807 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()
808 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()
809 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()
3895 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local
3899 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()
3901 max_limits in ci_enable_uvd_dpm()
3944 const struct radeon_clock_and_voltage_limits *max_limits; ci_enable_vce_dpm() local
[all...]
H A Dsi_dpm.c2950 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
3007 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
3009 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
3017 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3018 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3019 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3020 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()
3021 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()
3022 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()
3023 if (ps->performance_levels[i].vddci > max_limits in si_apply_state_adjust_rules()
[all...]
H A Dkv_dpm.c1948 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
1959 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
1963 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2082 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2084 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c3244 const struct phm_clock_and_voltage_limits *max_limits; in vega10_apply_state_adjust_rules() local
3260 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()
3268 max_limits->mclk) in vega10_apply_state_adjust_rules()
3270 max_limits->mclk; in vega10_apply_state_adjust_rules()
3272 max_limits->sclk) in vega10_apply_state_adjust_rules()
3274 max_limits->sclk; in vega10_apply_state_adjust_rules()
3291 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in vega10_apply_state_adjust_rules()
3292 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()
3308 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()
3333 sclk = (minimum_clocks.engineClock > max_limits in vega10_apply_state_adjust_rules()
4336 struct phm_clock_and_voltage_limits *max_limits = vega10_get_dal_power_level() local
[all...]
H A Dsmu7_hwmgr.c2993 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local
3008 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()
3015 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()
3016 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()
3017 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()
3018 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()
3027 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()
3028 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()
3043 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()
3070 sclk = (minimum_clocks.engineClock > max_limits in smu7_apply_state_adjust_rules()
[all...]
H A Dvega12_hwmgr.c1801 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()
1804 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()
1805 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
H A Dvega20_hwmgr.c2794 struct phm_clock_and_voltage_limits *max_limits = in vega20_get_dal_power_level()
2797 info->engine_max_clock = max_limits->sclk; in vega20_get_dal_power_level()
2798 info->memory_max_clock = max_limits->mclk; in vega20_get_dal_power_level()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/
H A Dsi_dpm.c3268 const struct amdgpu_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations()
3281 max_limits->sclk, in btc_adjust_clock_combinations()
3288 max_limits->mclk, in btc_adjust_clock_combinations()
3411 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
3465 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
3467 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
3475 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3476 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3477 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3478 ps->performance_levels[i].sclk = max_limits in si_apply_state_adjust_rules()
3267 btc_adjust_clock_combinations(struct amdgpu_device *adev, const struct amdgpu_clock_and_voltage_limits *max_limits, struct rv7xx_pl *pl) btc_adjust_clock_combinations() argument
[all...]
H A Dkv_dpm.c2205 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
2216 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
2220 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2339 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2341 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c3283 const struct amdgpu_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations()
3296 max_limits->sclk, in btc_adjust_clock_combinations()
3303 max_limits->mclk, in btc_adjust_clock_combinations()
3426 struct amdgpu_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local
3480 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()
3482 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()
3490 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3491 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3492 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3493 ps->performance_levels[i].sclk = max_limits in si_apply_state_adjust_rules()
3282 btc_adjust_clock_combinations(struct amdgpu_device *adev, const struct amdgpu_clock_and_voltage_limits *max_limits, struct rv7xx_pl *pl) btc_adjust_clock_combinations() argument
[all...]
H A Dkv_dpm.c2207 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local
2218 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()
2222 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()
2341 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local
2343 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_hwmgr.c3271 const struct phm_clock_and_voltage_limits *max_limits; in vega10_apply_state_adjust_rules() local
3287 max_limits = adev->pm.ac_power ? in vega10_apply_state_adjust_rules()
3295 max_limits->mclk) in vega10_apply_state_adjust_rules()
3297 max_limits->mclk; in vega10_apply_state_adjust_rules()
3299 max_limits->sclk) in vega10_apply_state_adjust_rules()
3301 max_limits->sclk; in vega10_apply_state_adjust_rules()
3318 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in vega10_apply_state_adjust_rules()
3319 stable_pstate_sclk = (max_limits->sclk * in vega10_apply_state_adjust_rules()
3335 stable_pstate_mclk = max_limits->mclk; in vega10_apply_state_adjust_rules()
3360 sclk = (minimum_clocks.engineClock > max_limits in vega10_apply_state_adjust_rules()
4358 struct phm_clock_and_voltage_limits *max_limits = vega10_get_dal_power_level() local
[all...]
H A Dsmu7_hwmgr.c3327 const struct phm_clock_and_voltage_limits *max_limits; in smu7_apply_state_adjust_rules() local
3341 max_limits = adev->pm.ac_power ? in smu7_apply_state_adjust_rules()
3348 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()
3349 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()
3350 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()
3351 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()
3360 max_limits = &(hwmgr->dyn_state.max_clock_voltage_on_ac); in smu7_apply_state_adjust_rules()
3361 stable_pstate_sclk = (max_limits->sclk * 75) / 100; in smu7_apply_state_adjust_rules()
3376 stable_pstate_mclk = max_limits->mclk; in smu7_apply_state_adjust_rules()
3411 sclk = (minimum_clocks.engineClock > max_limits in smu7_apply_state_adjust_rules()
[all...]
H A Dvega12_hwmgr.c1821 struct phm_clock_and_voltage_limits *max_limits = in vega12_get_dal_power_level()
1824 info->engine_max_clock = max_limits->sclk; in vega12_get_dal_power_level()
1825 info->memory_max_clock = max_limits->mclk; in vega12_get_dal_power_level()
H A Dvega20_hwmgr.c2794 struct phm_clock_and_voltage_limits *max_limits = in vega20_get_dal_power_level()
2797 info->engine_max_clock = max_limits->sclk; in vega20_get_dal_power_level()
2798 info->memory_max_clock = max_limits->mclk; in vega20_get_dal_power_level()

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