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Searched refs:mast (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/lib/
H A Dmaple_tree.c2262 * @mast: The maple subtree state
2265 static inline void mast_rebalance_next(struct maple_subtree_state *mast) in mast_rebalance_next() argument
2267 unsigned char b_end = mast->bn->b_end; in mast_rebalance_next()
2269 mas_mab_cp(mast->orig_r, 0, mt_slot_count(mast->orig_r->node), in mast_rebalance_next()
2270 mast->bn, b_end); in mast_rebalance_next()
2271 mast->orig_r->last = mast->orig_r->max; in mast_rebalance_next()
2276 * @mast: The maple subtree state
2279 static inline void mast_rebalance_prev(struct maple_subtree_state *mast) in mast_rebalance_prev() argument
2300 mast_spanning_rebalance(struct maple_subtree_state *mast) mast_spanning_rebalance() argument
2348 mast_ascend(struct maple_subtree_state *mast) mast_ascend() argument
2508 mast_set_split_parents(struct maple_subtree_state *mast, struct maple_enode *left, struct maple_enode *middle, struct maple_enode *right, unsigned char split, unsigned char mid_split) mast_set_split_parents() argument
2695 mast_cp_to_nodes(struct maple_subtree_state *mast, struct maple_enode *left, struct maple_enode *middle, struct maple_enode *right, unsigned char split, unsigned char mid_split) mast_cp_to_nodes() argument
2731 mast_combine_cp_left(struct maple_subtree_state *mast) mast_combine_cp_left() argument
2746 mast_combine_cp_right(struct maple_subtree_state *mast) mast_combine_cp_right() argument
2762 mast_sufficient(struct maple_subtree_state *mast) mast_sufficient() argument
2775 mast_overflow(struct maple_subtree_state *mast) mast_overflow() argument
2863 mas_spanning_rebalance(struct ma_state *mas, struct maple_subtree_state *mast, unsigned char count) mas_spanning_rebalance() argument
2996 struct maple_subtree_state mast; mas_rebalance() local
3170 mas_split_final_node(struct maple_subtree_state *mast, struct ma_state *mas, int height) mas_split_final_node() argument
3203 mast_fill_bnode(struct maple_subtree_state *mast, struct ma_state *mas, unsigned char skip) mast_fill_bnode() argument
3247 mast_split_data(struct maple_subtree_state *mast, struct ma_state *mas, unsigned char split) mast_split_data() argument
3280 mas_push_data(struct ma_state *mas, int height, struct maple_subtree_state *mast, bool left) mas_push_data() argument
3350 struct maple_subtree_state mast; mas_split() local
3824 struct maple_subtree_state mast; mas_wr_spanning_store() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv50.c129 u32 src, mast = nvkm_rd32(device, 0x00c040); in read_pll_ref() local
133 src = !!(mast & 0x00200000); in read_pll_ref()
136 src = !!(mast & 0x00400000); in read_pll_ref()
139 src = !!(mast & 0x00010000); in read_pll_ref()
142 src = !!(mast & 0x02000000); in read_pll_ref()
161 u32 mast = nvkm_rd32(device, 0x00c040); in read_pll() local
168 if (base == 0x004028 && (mast & 0x00100000)) { in read_pll()
197 u32 mast = nvkm_rd32(device, 0x00c040); in nv50_clk_read() local
212 switch (mast & 0x30000000) { in nv50_clk_read()
220 if (!(mast in nv50_clk_read()
[all...]
H A Dmcp77.c86 u32 mast = nvkm_rd32(device, 0x00c054); in mcp77_clk_read() local
99 switch (mast & 0x000c0000) { in mcp77_clk_read()
109 switch (mast & 0x00000003) { in mcp77_clk_read()
117 if ((mast & 0x03000000) != 0x03000000) in mcp77_clk_read()
120 if ((mast & 0x00000200) == 0x00000000) in mcp77_clk_read()
123 switch (mast & 0x00000c00) { in mcp77_clk_read()
131 switch (mast & 0x00000030) { in mcp77_clk_read()
133 if (mast & 0x00000040) in mcp77_clk_read()
147 switch (mast & 0x00400000) { in mcp77_clk_read()
160 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); in mcp77_clk_read()
304 u32 pllmask = 0, mast; mcp77_clk_prog() local
[all...]
H A Dnv40.c102 u32 mast = nvkm_rd32(device, 0x00c040); in nv40_clk_read() local
110 return read_clk(clk, (mast & 0x00000003) >> 0); in nv40_clk_read()
112 return read_clk(clk, (mast & 0x00000030) >> 4); in nv40_clk_read()
119 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); in nv40_clk_read()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv50.c129 u32 src, mast = nvkm_rd32(device, 0x00c040); in read_pll_ref() local
133 src = !!(mast & 0x00200000); in read_pll_ref()
136 src = !!(mast & 0x00400000); in read_pll_ref()
139 src = !!(mast & 0x00010000); in read_pll_ref()
142 src = !!(mast & 0x02000000); in read_pll_ref()
161 u32 mast = nvkm_rd32(device, 0x00c040); in read_pll() local
168 if (base == 0x004028 && (mast & 0x00100000)) { in read_pll()
197 u32 mast = nvkm_rd32(device, 0x00c040); in nv50_clk_read() local
212 switch (mast & 0x30000000) { in nv50_clk_read()
220 if (!(mast in nv50_clk_read()
[all...]
H A Dmcp77.c86 u32 mast = nvkm_rd32(device, 0x00c054); in mcp77_clk_read() local
99 switch (mast & 0x000c0000) { in mcp77_clk_read()
109 switch (mast & 0x00000003) { in mcp77_clk_read()
117 if ((mast & 0x03000000) != 0x03000000) in mcp77_clk_read()
120 if ((mast & 0x00000200) == 0x00000000) in mcp77_clk_read()
123 switch (mast & 0x00000c00) { in mcp77_clk_read()
131 switch (mast & 0x00000030) { in mcp77_clk_read()
133 if (mast & 0x00000040) in mcp77_clk_read()
146 switch (mast & 0x00400000) { in mcp77_clk_read()
157 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); in mcp77_clk_read()
301 u32 pllmask = 0, mast; mcp77_clk_prog() local
[all...]
H A Dnv40.c102 u32 mast = nvkm_rd32(device, 0x00c040); in nv40_clk_read() local
110 return read_clk(clk, (mast & 0x00000003) >> 0); in nv40_clk_read()
112 return read_clk(clk, (mast & 0x00000030) >> 4); in nv40_clk_read()
119 nvkm_debug(subdev, "unknown clock source %d %08x\n", src, mast); in nv40_clk_read()

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