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Searched refs:lane_reg (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c222 u32 lane_reg, lane_value; in cdv_dpll_set_clock_cdv() local
335 lane_reg = PSB_LANE0; in cdv_dpll_set_clock_cdv()
336 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
339 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
341 lane_reg = PSB_LANE1; in cdv_dpll_set_clock_cdv()
342 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
345 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
347 lane_reg = PSB_LANE2; in cdv_dpll_set_clock_cdv()
348 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
351 cdv_sb_write(dev, lane_reg, lane_valu in cdv_dpll_set_clock_cdv()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c223 u32 lane_reg, lane_value; in cdv_dpll_set_clock_cdv() local
336 lane_reg = PSB_LANE0; in cdv_dpll_set_clock_cdv()
337 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
340 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
342 lane_reg = PSB_LANE1; in cdv_dpll_set_clock_cdv()
343 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
346 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
348 lane_reg = PSB_LANE2; in cdv_dpll_set_clock_cdv()
349 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
352 cdv_sb_write(dev, lane_reg, lane_valu in cdv_dpll_set_clock_cdv()
[all...]

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