irq_handler_offset (reference) in projects: kernel - OpenGrok search results

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Searched refs:irq_handler_offset (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-6.6/drivers/accel/habanalabs/gaudi/
H A D	gaudi.c	2552 u32 dma_qm_err_cfg, irq_handler_offset; in gaudi_init_pci_dma_qman() local 2601 irq_handler_offset = hdev->asic_prop.gic_interrupts_enable ? in gaudi_init_pci_dma_qman() 2614 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_pci_dma_qman() 2616 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_pci_dma_qman() 2641 u32 irq_handler_offset; in gaudi_init_dma_core() local 2656 irq_handler_offset = hdev->asic_prop.gic_interrupts_enable ? in gaudi_init_dma_core() 2661 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_dma_core() 2663 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_dma_core() 2731 u32 dma_qm_err_cfg, irq_handler_offset; in gaudi_init_hbm_dma_qman() local 2772 irq_handler_offset in gaudi_init_hbm_dma_qman() 2873 u32 irq_handler_offset; gaudi_init_mme_qman() local 2999 u32 tpc_qm_err_cfg, irq_handler_offset; gaudi_init_tpc_qman() local 3150 u32 nic_qm_err_cfg, irq_handler_offset; gaudi_init_nic_qman() local 3819 u32 status, irq_handler_offset; gaudi_init_cpu_queues() local 4006 u32 status, reset_timeout_ms, cpu_timeout_ms, irq_handler_offset; gaudi_hw_fini() local 4188 u32 db_reg_offset, db_value, dma_qm_offset, q_off, irq_handler_offset; gaudi_ring_doorbell() local 8788 u32 irq_handler_offset = hdev->asic_prop.gic_interrupts_enable ? gaudi_enable_events_from_fw() local [all...]
/kernel/linux/linux-6.6/drivers/accel/habanalabs/gaudi2/
H A D	gaudi2.c	4963 u32 glbl_prot = QMAN_MAKE_TRUSTED, irq_handler_offset; in gaudi2_init_qman_common() local 4968 irq_handler_offset = gaudi2_get_dyn_sp_reg(hdev, queue_id_base); in gaudi2_init_qman_common() 4969 WREG32(reg_base + QM_GLBL_ERR_ADDR_LO_OFFSET, lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi2_init_qman_common() 4970 WREG32(reg_base + QM_GLBL_ERR_ADDR_HI_OFFSET, upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi2_init_qman_common() 5013 u32 prot, irq_handler_offset; in gaudi2_init_dma_core() local 5024 irq_handler_offset = le32_to_cpu(dyn_regs->gic_dma_core_irq_ctrl); in gaudi2_init_dma_core() 5027 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi2_init_dma_core() 5030 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi2_init_dma_core() 10911 u32 irq_handler_offset = le32_to_cpu(dyn_regs->gic_host_ints_irq); in gaudi2_enable_events_from_fw() local 10914 WREG32(irq_handler_offset, in gaudi2_enable_events_from_fw() [all...]

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