/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
H A D | intel_timeline.c | 52 struct intel_timeline_hwsp *hwsp; in hwsp_alloc() local 59 hwsp = list_first_entry_or_null(>->hwsp_free_list, in hwsp_alloc() 60 typeof(*hwsp), free_link); in hwsp_alloc() 61 if (!hwsp) { in hwsp_alloc() 66 hwsp = kmalloc(sizeof(*hwsp), GFP_KERNEL); in hwsp_alloc() 67 if (!hwsp) in hwsp_alloc() 72 kfree(hwsp); in hwsp_alloc() 78 vma->private = hwsp; in hwsp_alloc() 79 hwsp in hwsp_alloc() 100 __idle_hwsp_free(struct intel_timeline_hwsp *hwsp, int cacheline) __idle_hwsp_free() argument 164 cacheline_alloc(struct intel_timeline_hwsp *hwsp, unsigned int cacheline) cacheline_alloc() argument 218 intel_timeline_init(struct intel_timeline *timeline, struct intel_gt *gt, struct i915_vma *hwsp, unsigned int offset) intel_timeline_init() argument 563 intel_timeline_read_hwsp(struct i915_request *from, struct i915_request *to, u32 *hwsp) intel_timeline_read_hwsp() argument [all...] |
H A D | intel_ring_submission.c | 91 i915_reg_t hwsp; in set_hwsp() local 107 hwsp = RENDER_HWS_PGA_GEN7; in set_hwsp() 110 hwsp = BLT_HWS_PGA_GEN7; in set_hwsp() 113 hwsp = BSD_HWS_PGA_GEN7; in set_hwsp() 116 hwsp = VEBOX_HWS_PGA_GEN7; in set_hwsp() 120 hwsp = RING_HWS_PGA_GEN6(engine->mmio_base); in set_hwsp() 122 hwsp = RING_HWS_PGA(engine->mmio_base); in set_hwsp() 125 intel_uncore_write(engine->uncore, hwsp, offset); in set_hwsp() 126 intel_uncore_posting_read(engine->uncore, hwsp); in set_hwsp()
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H A D | intel_timeline_types.h | 94 struct intel_timeline_hwsp *hwsp; member
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H A D | intel_engine_cs.c | 806 unsigned int hwsp, in create_pinned_context() 818 ce->timeline = page_pack_bits(NULL, hwsp); in create_pinned_context() 1369 "ring:{start:%08x, hwsp:%08x, seqno:%08x, runtime:%llums}, ", in print_ring() 1673 drm_printf(m, "\t\tring->hwsp: 0x%08x\n", in intel_engine_dump() 805 create_pinned_context(struct intel_engine_cs *engine, unsigned int hwsp, struct lock_class_key *key, const char *name) create_pinned_context() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/ |
H A D | intel_timeline.c | 77 struct i915_vma *hwsp, in intel_timeline_init() 85 if (hwsp) { in intel_timeline_init() 87 timeline->hwsp_ggtt = i915_vma_get(hwsp); in intel_timeline_init() 90 hwsp = hwsp_alloc(gt); in intel_timeline_init() 91 if (IS_ERR(hwsp)) in intel_timeline_init() 92 return PTR_ERR(hwsp); in intel_timeline_init() 93 timeline->hwsp_ggtt = hwsp; in intel_timeline_init() 99 GEM_BUG_ON(timeline->hwsp_offset >= hwsp->size); in intel_timeline_init() 170 struct i915_vma *hwsp = engine->status_page.vma; in intel_timeline_create_from_engine() local 173 tl = __intel_timeline_create(engine->gt, hwsp, offse in intel_timeline_create_from_engine() 75 intel_timeline_init(struct intel_timeline *timeline, struct intel_gt *gt, struct i915_vma *hwsp, unsigned int offset) intel_timeline_init() argument 339 intel_timeline_read_hwsp(struct i915_request *from, struct i915_request *to, u32 *hwsp) intel_timeline_read_hwsp() argument [all...] |
H A D | intel_ring_submission.c | 78 i915_reg_t hwsp; in set_hwsp() local 94 hwsp = RENDER_HWS_PGA_GEN7; in set_hwsp() 97 hwsp = BLT_HWS_PGA_GEN7; in set_hwsp() 100 hwsp = BSD_HWS_PGA_GEN7; in set_hwsp() 103 hwsp = VEBOX_HWS_PGA_GEN7; in set_hwsp() 107 hwsp = RING_HWS_PGA_GEN6(engine->mmio_base); in set_hwsp() 109 hwsp = RING_HWS_PGA(engine->mmio_base); in set_hwsp() 112 intel_uncore_write_fw(engine->uncore, hwsp, offset); in set_hwsp() 113 intel_uncore_posting_read_fw(engine->uncore, hwsp); in set_hwsp()
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H A D | selftest_timeline.c | 744 /* With wrap should come a new hwsp */ in live_hwsp_wrap() 779 u32 seqno, u32 hwsp, in emit_read_hwsp() 797 *cs++ = hwsp; in emit_read_hwsp() 897 bool (*op)(u32 hwsp, u32 seqno)) in check_watcher() 1032 u32 hwsp, dummy; in live_hwsp_read() local 1085 err = intel_timeline_read_hwsp(rq, watcher[0].rq, &hwsp); in live_hwsp_read() 1088 rq->fence.seqno, hwsp, in live_hwsp_read() 1099 err = intel_timeline_read_hwsp(rq, watcher[1].rq, &hwsp); in live_hwsp_read() 1102 rq->fence.seqno, hwsp, in live_hwsp_read() 778 emit_read_hwsp(struct i915_request *rq, u32 seqno, u32 hwsp, u32 *addr) emit_read_hwsp() argument 896 check_watcher(struct hwsp_watcher *w, const char *name, bool (*op)(u32 hwsp, u32 seqno)) check_watcher() argument
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H A D | intel_engine_cs.c | 1367 unsigned int hwsp, in intel_engine_create_pinned_context() 1379 ce->timeline = page_pack_bits(NULL, hwsp); in intel_engine_create_pinned_context() 1408 struct i915_vma *hwsp = engine->status_page.vma; in intel_engine_destroy_pinned_context() local 1410 GEM_BUG_ON(ce->timeline->hwsp_ggtt != hwsp); in intel_engine_destroy_pinned_context() 1412 mutex_lock(&hwsp->vm->mutex); in intel_engine_destroy_pinned_context() 1414 mutex_unlock(&hwsp->vm->mutex); in intel_engine_destroy_pinned_context() 2004 "ring:{start:%08x, hwsp:%08x, seqno:%08x, runtime:%llums}, ", in print_ring() 2286 drm_printf(m, "\t\tring->hwsp: 0x%08x\n", in engine_dump_request() 1364 intel_engine_create_pinned_context(struct intel_engine_cs *engine, struct i915_address_space *vm, unsigned int ring_size, unsigned int hwsp, struct lock_class_key *key, const char *name) intel_engine_create_pinned_context() argument
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H A D | intel_engine.h | 261 unsigned int hwsp,
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
H A D | i915_request.h | 406 const u32 *hwsp = READ_ONCE(rq->hwsp_seqno); in __hwsp_seqno() local 408 return READ_ONCE(*hwsp); in __hwsp_seqno()
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/ |
H A D | i915_request.h | 486 const u32 *hwsp = READ_ONCE(rq->hwsp_seqno); in __hwsp_seqno() local 488 return READ_ONCE(*hwsp); in __hwsp_seqno()
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