Home
last modified time | relevance | path

Searched refs:hwmgr (Results 1 - 25 of 181) sorted by relevance

12345678

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/
H A Damd_powerplay.c33 #include "hwmgr.h"
40 struct pp_hwmgr *hwmgr; in amd_powerplay_create() local
45 hwmgr = kzalloc(sizeof(struct pp_hwmgr), GFP_KERNEL); in amd_powerplay_create()
46 if (hwmgr == NULL) in amd_powerplay_create()
49 hwmgr->adev = adev; in amd_powerplay_create()
50 hwmgr->not_vf = !amdgpu_sriov_vf(adev); in amd_powerplay_create()
51 hwmgr->device = amdgpu_cgs_create_device(adev); in amd_powerplay_create()
52 mutex_init(&hwmgr->smu_lock); in amd_powerplay_create()
53 mutex_init(&hwmgr->msg_lock); in amd_powerplay_create()
54 hwmgr in amd_powerplay_create()
66 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; amd_powerplay_destroy() local
97 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_sw_init() local
110 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_sw_fini() local
124 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_hw_init() local
137 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_hw_fini() local
149 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_reserve_vram_for_smu() local
178 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_late_init() local
226 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_suspend() local
234 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_resume() local
279 struct pp_hwmgr *hwmgr = handle; pp_dpm_load_fw() local
299 struct pp_hwmgr *hwmgr = handle; pp_set_clockgating_by_smu() local
312 pp_dpm_en_umd_pstate(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level *level) pp_dpm_en_umd_pstate() argument
351 struct pp_hwmgr *hwmgr = handle; pp_dpm_force_performance_level() local
371 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_performance_level() local
385 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_sclk() local
403 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_mclk() local
421 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_vce() local
437 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_uvd() local
455 struct pp_hwmgr *hwmgr = handle; pp_dpm_dispatch_tasks() local
469 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_current_power_state() local
504 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_fan_control_mode() local
520 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_fan_control_mode() local
538 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_fan_speed_percent() local
556 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_fan_speed_percent() local
575 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_fan_speed_rpm() local
592 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_fan_speed_rpm() local
611 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_pp_num_states() local
649 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_pp_table() local
664 struct pp_hwmgr *hwmgr = handle; amd_powerplay_reset() local
680 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_pp_table() local
718 struct pp_hwmgr *hwmgr = handle; pp_dpm_force_clock_level() local
743 struct pp_hwmgr *hwmgr = handle; pp_dpm_print_clock_levels() local
761 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_sclk_od() local
779 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_sclk_od() local
798 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_mclk_od() local
816 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_mclk_od() local
835 struct pp_hwmgr *hwmgr = handle; pp_dpm_read_sensor() local
865 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_vce_clock_state() local
877 struct pp_hwmgr *hwmgr = handle; pp_get_power_profile_mode() local
892 struct pp_hwmgr *hwmgr = handle; pp_set_power_profile_mode() local
916 struct pp_hwmgr *hwmgr = handle; pp_set_fine_grain_clk_vol() local
930 struct pp_hwmgr *hwmgr = handle; pp_odn_edit_dpm_table() local
945 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_mp1_state() local
962 struct pp_hwmgr *hwmgr = handle; pp_dpm_switch_power_profile() local
1008 struct pp_hwmgr *hwmgr = handle; pp_set_power_limit() local
1040 struct pp_hwmgr *hwmgr = handle; pp_get_power_limit() local
1065 struct pp_hwmgr *hwmgr = handle; pp_display_configuration_change() local
1079 struct pp_hwmgr *hwmgr = handle; pp_get_display_power_level() local
1096 struct pp_hwmgr *hwmgr = handle; pp_get_current_clocks() local
1145 struct pp_hwmgr *hwmgr = handle; pp_get_clock_by_type() local
1164 struct pp_hwmgr *hwmgr = handle; pp_get_clock_by_type_with_latency() local
1180 struct pp_hwmgr *hwmgr = handle; pp_get_clock_by_type_with_voltage() local
1197 struct pp_hwmgr *hwmgr = handle; pp_set_watermarks_for_clocks_ranges() local
1214 struct pp_hwmgr *hwmgr = handle; pp_display_clock_voltage_request() local
1230 struct pp_hwmgr *hwmgr = handle; pp_get_display_mode_validation_clocks() local
1249 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_mmhub() local
1264 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_gfx() local
1279 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_acp() local
1294 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_sdma() local
1340 struct pp_hwmgr *hwmgr = handle; pp_notify_smu_enable_pwe() local
1359 struct pp_hwmgr *hwmgr = handle; pp_enable_mgpu_fan_boost() local
1377 struct pp_hwmgr *hwmgr = handle; pp_set_min_deep_sleep_dcefclk() local
1396 struct pp_hwmgr *hwmgr = handle; pp_set_hard_min_dcefclk_by_freq() local
1415 struct pp_hwmgr *hwmgr = handle; pp_set_hard_min_fclk_by_freq() local
1434 struct pp_hwmgr *hwmgr = handle; pp_set_active_display_count() local
1449 struct pp_hwmgr *hwmgr = handle; pp_get_asic_baco_capability() local
1468 struct pp_hwmgr *hwmgr = handle; pp_get_asic_baco_state() local
1485 struct pp_hwmgr *hwmgr = handle; pp_set_asic_baco_state() local
1503 struct pp_hwmgr *hwmgr = handle; pp_get_ppfeature_status() local
1523 struct pp_hwmgr *hwmgr = handle; pp_set_ppfeature_status() local
1543 struct pp_hwmgr *hwmgr = handle; pp_asic_reset_mode_2() local
1563 struct pp_hwmgr *hwmgr = handle; pp_smu_i2c_bus_access() local
1583 struct pp_hwmgr *hwmgr = handle; pp_set_df_cstate() local
1600 struct pp_hwmgr *hwmgr = handle; pp_set_xgmi_pstate() local
1617 struct pp_hwmgr *hwmgr = handle; pp_get_gpu_metrics() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dhwmgr.c32 #include "hwmgr.h"
49 extern int smu7_init_function_pointers(struct pp_hwmgr *hwmgr);
50 extern int smu8_init_function_pointers(struct pp_hwmgr *hwmgr);
51 extern int vega10_hwmgr_init(struct pp_hwmgr *hwmgr);
52 extern int vega12_hwmgr_init(struct pp_hwmgr *hwmgr);
53 extern int vega20_hwmgr_init(struct pp_hwmgr *hwmgr);
54 extern int smu10_init_function_pointers(struct pp_hwmgr *hwmgr);
56 static int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr);
57 static void hwmgr_init_default_caps(struct pp_hwmgr *hwmgr);
58 static int hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr);
65 hwmgr_init_workload_prority(struct pp_hwmgr *hwmgr) hwmgr_init_workload_prority() argument
82 hwmgr_early_init(struct pp_hwmgr *hwmgr) hwmgr_early_init() argument
200 hwmgr_sw_init(struct pp_hwmgr *hwmgr) hwmgr_sw_init() argument
212 hwmgr_sw_fini(struct pp_hwmgr *hwmgr) hwmgr_sw_fini() argument
220 hwmgr_hw_init(struct pp_hwmgr *hwmgr) hwmgr_hw_init() argument
283 hwmgr_hw_fini(struct pp_hwmgr *hwmgr) hwmgr_hw_fini() argument
301 hwmgr_suspend(struct pp_hwmgr *hwmgr) hwmgr_suspend() argument
320 hwmgr_resume(struct pp_hwmgr *hwmgr) hwmgr_resume() argument
361 hwmgr_handle_task(struct pp_hwmgr *hwmgr, enum amd_pp_task task_id, enum amd_pm_state_type *user_state) hwmgr_handle_task() argument
413 hwmgr_init_default_caps(struct pp_hwmgr *hwmgr) hwmgr_init_default_caps() argument
445 hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr) hwmgr_set_user_specify_caps() argument
472 polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr) polaris_set_asic_special_caps() argument
499 fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr) fiji_set_asic_special_caps() argument
514 tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr) tonga_set_asic_special_caps() argument
534 topaz_set_asic_special_caps(struct pp_hwmgr *hwmgr) topaz_set_asic_special_caps() argument
549 ci_set_asic_special_caps(struct pp_hwmgr *hwmgr) ci_set_asic_special_caps() argument
[all...]
H A Dhardwaremanager.c25 #include "hwmgr.h"
39 int phm_setup_asic(struct pp_hwmgr *hwmgr) in phm_setup_asic() argument
41 PHM_FUNC_CHECK(hwmgr); in phm_setup_asic()
43 if (NULL != hwmgr->hwmgr_func->asic_setup) in phm_setup_asic()
44 return hwmgr->hwmgr_func->asic_setup(hwmgr); in phm_setup_asic()
49 int phm_power_down_asic(struct pp_hwmgr *hwmgr) in phm_power_down_asic() argument
51 PHM_FUNC_CHECK(hwmgr); in phm_power_down_asic()
53 if (NULL != hwmgr->hwmgr_func->power_off_asic) in phm_power_down_asic()
54 return hwmgr in phm_power_down_asic()
59 phm_set_power_state(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pcurrent_state, const struct pp_hw_power_state *pnew_power_state) phm_set_power_state() argument
76 phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr) phm_enable_dynamic_state_management() argument
96 phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr) phm_disable_dynamic_state_management() argument
116 phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) phm_force_dpm_levels() argument
128 phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *adjusted_ps, const struct pp_power_state *current_ps) phm_apply_state_adjust_rules() argument
142 phm_apply_clock_adjust_rules(struct pp_hwmgr *hwmgr) phm_apply_clock_adjust_rules() argument
151 phm_powerdown_uvd(struct pp_hwmgr *hwmgr) phm_powerdown_uvd() argument
161 phm_disable_clock_power_gatings(struct pp_hwmgr *hwmgr) phm_disable_clock_power_gatings() argument
171 phm_pre_display_configuration_changed(struct pp_hwmgr *hwmgr) phm_pre_display_configuration_changed() argument
182 phm_display_configuration_changed(struct pp_hwmgr *hwmgr) phm_display_configuration_changed() argument
192 phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr) phm_notify_smc_display_config_after_ps_adjustment() argument
202 phm_stop_thermal_controller(struct pp_hwmgr *hwmgr) phm_stop_thermal_controller() argument
215 phm_register_irq_handlers(struct pp_hwmgr *hwmgr) phm_register_irq_handlers() argument
231 phm_start_thermal_controller(struct pp_hwmgr *hwmgr) phm_start_thermal_controller() argument
272 phm_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) phm_check_smc_update_required_for_display_configuration() argument
288 phm_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal) phm_check_states_equal() argument
301 phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr, const struct amd_pp_display_configuration *display_config) phm_store_dal_configuration_data() argument
338 phm_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) phm_get_dal_power_level() argument
348 phm_set_cpu_power_state(struct pp_hwmgr *hwmgr) phm_set_cpu_power_state() argument
359 phm_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) phm_get_performance_level() argument
381 phm_get_clock_info(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *pclock_info, PHM_PerformanceLevelDesignation designation) phm_get_clock_info() argument
414 phm_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) phm_get_current_shallow_sleep_clocks() argument
425 phm_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) phm_get_clock_by_type() argument
436 phm_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) phm_get_clock_by_type_with_latency() argument
449 phm_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_voltage *clocks) phm_get_clock_by_type_with_voltage() argument
462 phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_ranges) phm_set_watermarks_for_clocks_ranges() argument
474 phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr, struct pp_display_clock_request *clock) phm_display_clock_voltage_request() argument
485 phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) phm_get_max_high_clocks() argument
495 phm_disable_smc_firmware_ctf(struct pp_hwmgr *hwmgr) phm_disable_smc_firmware_ctf() argument
508 phm_set_active_display_count(struct pp_hwmgr *hwmgr, uint32_t count) phm_set_active_display_count() argument
518 phm_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock) phm_set_min_deep_sleep_dcefclk() argument
528 phm_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) phm_set_hard_min_dcefclk_by_freq() argument
538 phm_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) phm_set_hard_min_fclk_by_freq() argument
[all...]
H A Dpp_psm.c29 int psm_init_power_state_table(struct pp_hwmgr *hwmgr) in psm_init_power_state_table() argument
37 if (hwmgr->hwmgr_func->get_num_of_pp_table_entries == NULL) in psm_init_power_state_table()
40 if (hwmgr->hwmgr_func->get_power_state_size == NULL) in psm_init_power_state_table()
43 hwmgr->num_ps = table_entries = hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr); in psm_init_power_state_table()
45 hwmgr->ps_size = size = hwmgr->hwmgr_func->get_power_state_size(hwmgr) + in psm_init_power_state_table()
53 hwmgr in psm_init_power_state_table()
94 psm_fini_power_state_table(struct pp_hwmgr *hwmgr) psm_fini_power_state_table() argument
111 psm_get_ui_state(struct pp_hwmgr *hwmgr, enum PP_StateUILabel ui_label, unsigned long *state_id) psm_get_ui_state() argument
132 psm_get_state_by_classification(struct pp_hwmgr *hwmgr, enum PP_StateClassificationFlag flag, unsigned long *state_id) psm_get_state_by_classification() argument
153 psm_set_states(struct pp_hwmgr *hwmgr, unsigned long state_id) psm_set_states() argument
173 psm_set_boot_states(struct pp_hwmgr *hwmgr) psm_set_boot_states() argument
188 psm_set_performance_states(struct pp_hwmgr *hwmgr) psm_set_performance_states() argument
203 psm_set_user_performance_state(struct pp_hwmgr *hwmgr, enum PP_StateUILabel label_id, struct pp_power_state **state) psm_set_user_performance_state() argument
234 power_state_management(struct pp_hwmgr *hwmgr, struct pp_power_state *new_ps) power_state_management() argument
259 psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip_display_settings, struct pp_power_state *new_ps) psm_adjust_power_state_dynamic() argument
[all...]
H A Dsmu7_thermal.c29 int smu7_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, in smu7_fan_ctrl_get_fan_speed_info() argument
32 if (hwmgr->thermal_controller.fanInfo.bNoFan) in smu7_fan_ctrl_get_fan_speed_info()
41 hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution) { in smu7_fan_ctrl_get_fan_speed_info()
44 fan_speed_info->min_rpm = hwmgr->thermal_controller.fanInfo.ulMinRPM; in smu7_fan_ctrl_get_fan_speed_info()
45 fan_speed_info->max_rpm = hwmgr->thermal_controller.fanInfo.ulMaxRPM; in smu7_fan_ctrl_get_fan_speed_info()
54 int smu7_fan_ctrl_get_fan_speed_percent(struct pp_hwmgr *hwmgr, in smu7_fan_ctrl_get_fan_speed_percent() argument
61 if (hwmgr->thermal_controller.fanInfo.bNoFan) in smu7_fan_ctrl_get_fan_speed_percent()
64 duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in smu7_fan_ctrl_get_fan_speed_percent()
66 duty = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in smu7_fan_ctrl_get_fan_speed_percent()
83 int smu7_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_ argument
111 smu7_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode) smu7_fan_ctrl_set_static_mode() argument
136 smu7_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr) smu7_fan_ctrl_set_default_mode() argument
149 smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) smu7_fan_ctrl_start_smc_fan_control() argument
184 smu7_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr) smu7_fan_ctrl_stop_smc_fan_control() argument
196 smu7_fan_ctrl_set_fan_speed_percent(struct pp_hwmgr *hwmgr, uint32_t speed) smu7_fan_ctrl_set_fan_speed_percent() argument
233 smu7_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr) smu7_fan_ctrl_reset_fan_speed_to_default() argument
256 smu7_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) smu7_fan_ctrl_set_fan_speed_rpm() argument
287 smu7_thermal_get_temperature(struct pp_hwmgr *hwmgr) smu7_thermal_get_temperature() argument
312 smu7_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, int low_temp, int high_temp) smu7_thermal_set_temperature_range() argument
346 smu7_thermal_initialize(struct pp_hwmgr *hwmgr) smu7_thermal_initialize() argument
365 smu7_thermal_enable_alert(struct pp_hwmgr *hwmgr) smu7_thermal_enable_alert() argument
383 smu7_thermal_disable_alert(struct pp_hwmgr *hwmgr) smu7_thermal_disable_alert() argument
402 smu7_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr) smu7_thermal_stop_thermal_controller() argument
421 smu7_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr) smu7_thermal_start_smc_fan_control() argument
436 smu7_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range) smu7_start_thermal_controller() argument
465 smu7_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr) smu7_thermal_ctrl_uninitialize_thermal_controller() argument
[all...]
H A Dvega10_thermal.c32 static int vega10_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm) in vega10_get_current_rpm() argument
34 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentRpm, current_rpm); in vega10_get_current_rpm()
38 int vega10_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, in vega10_fan_ctrl_get_fan_speed_info() argument
42 if (hwmgr->thermal_controller.fanInfo.bNoFan) in vega10_fan_ctrl_get_fan_speed_info()
51 hwmgr->thermal_controller.fanInfo. in vega10_fan_ctrl_get_fan_speed_info()
56 hwmgr->thermal_controller.fanInfo.ulMinRPM; in vega10_fan_ctrl_get_fan_speed_info()
58 hwmgr->thermal_controller.fanInfo.ulMaxRPM; in vega10_fan_ctrl_get_fan_speed_info()
67 int vega10_fan_ctrl_get_fan_speed_percent(struct pp_hwmgr *hwmgr, in vega10_fan_ctrl_get_fan_speed_percent() argument
73 if (hwmgr->thermal_controller.fanInfo.bNoFan) in vega10_fan_ctrl_get_fan_speed_percent()
76 if (vega10_get_current_rpm(hwmgr, in vega10_fan_ctrl_get_fan_speed_percent()
90 vega10_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed) vega10_fan_ctrl_get_fan_speed_rpm() argument
127 vega10_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode) vega10_fan_ctrl_set_static_mode() argument
156 vega10_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr) vega10_fan_ctrl_set_default_mode() argument
182 vega10_enable_fan_control_feature(struct pp_hwmgr *hwmgr) vega10_enable_fan_control_feature() argument
199 vega10_disable_fan_control_feature(struct pp_hwmgr *hwmgr) vega10_disable_fan_control_feature() argument
216 vega10_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) vega10_fan_ctrl_start_smc_fan_control() argument
229 vega10_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr) vega10_fan_ctrl_stop_smc_fan_control() argument
250 vega10_fan_ctrl_set_fan_speed_percent(struct pp_hwmgr *hwmgr, uint32_t speed) vega10_fan_ctrl_set_fan_speed_percent() argument
289 vega10_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr) vega10_fan_ctrl_reset_fan_speed_to_default() argument
306 vega10_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) vega10_fan_ctrl_set_fan_speed_rpm() argument
338 vega10_thermal_get_temperature(struct pp_hwmgr *hwmgr) vega10_thermal_get_temperature() argument
363 vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range) vega10_thermal_set_temperature_range() argument
413 vega10_thermal_initialize(struct pp_hwmgr *hwmgr) vega10_thermal_initialize() argument
436 vega10_thermal_enable_alert(struct pp_hwmgr *hwmgr) vega10_thermal_enable_alert() argument
467 vega10_thermal_disable_alert(struct pp_hwmgr *hwmgr) vega10_thermal_disable_alert() argument
495 vega10_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr) vega10_thermal_stop_thermal_controller() argument
514 vega10_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) vega10_thermal_setup_fan_table() argument
571 vega10_enable_mgpu_fan_boost(struct pp_hwmgr *hwmgr) vega10_enable_mgpu_fan_boost() argument
617 vega10_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr) vega10_thermal_start_smc_fan_control() argument
631 vega10_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range) vega10_start_thermal_controller() argument
662 vega10_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr) vega10_thermal_ctrl_uninitialize_thermal_controller() argument
[all...]
H A Dsmu7_hwmgr.c45 #include "hwmgr.h"
113 static int smu7_force_clock_level(struct pp_hwmgr *hwmgr,
139 * @param hwmgr the address of the powerplay hardware manager.
142 static int smu7_get_mc_microcode_version(struct pp_hwmgr *hwmgr) in smu7_get_mc_microcode_version() argument
144 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, 0x9F); in smu7_get_mc_microcode_version()
146 hwmgr->microcode_version_info.MC = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA); in smu7_get_mc_microcode_version()
151 static uint16_t smu7_get_current_pcie_speed(struct pp_hwmgr *hwmgr) in smu7_get_current_pcie_speed() argument
156 speedCntl = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__PCIE, in smu7_get_current_pcie_speed()
162 static int smu7_get_current_pcie_lane_number(struct pp_hwmgr *hwmgr) in smu7_get_current_pcie_lane_number() argument
182 smu7_enable_smc_voltage_controller(struct pp_hwmgr *hwmgr) smu7_enable_smc_voltage_controller() argument
202 smu7_voltage_control(const struct pp_hwmgr *hwmgr) smu7_voltage_control() argument
216 smu7_enable_voltage_control(struct pp_hwmgr *hwmgr) smu7_enable_voltage_control() argument
254 smu7_construct_voltage_tables(struct pp_hwmgr *hwmgr) smu7_construct_voltage_tables() argument
366 smu7_program_static_screen_threshold_parameters( struct pp_hwmgr *hwmgr) smu7_program_static_screen_threshold_parameters() argument
389 smu7_enable_display_gap(struct pp_hwmgr *hwmgr) smu7_enable_display_gap() argument
413 smu7_program_voting_clients(struct pp_hwmgr *hwmgr) smu7_program_voting_clients() argument
431 smu7_clear_voting_clients(struct pp_hwmgr *hwmgr) smu7_clear_voting_clients() argument
451 smu7_copy_and_switch_arb_sets(struct pp_hwmgr *hwmgr, uint32_t arb_src, uint32_t arb_dest) smu7_copy_and_switch_arb_sets() argument
497 smu7_reset_to_default(struct pp_hwmgr *hwmgr) smu7_reset_to_default() argument
509 smu7_initial_switch_from_arbf0_to_f1(struct pp_hwmgr *hwmgr) smu7_initial_switch_from_arbf0_to_f1() argument
515 smu7_force_switch_to_arbf0(struct pp_hwmgr *hwmgr) smu7_force_switch_to_arbf0() argument
530 smu7_override_pcie_speed(struct pp_hwmgr *hwmgr) smu7_override_pcie_speed() argument
551 smu7_override_pcie_width(struct pp_hwmgr *hwmgr) smu7_override_pcie_width() argument
572 smu7_setup_default_pcie_table(struct pp_hwmgr *hwmgr) smu7_setup_default_pcie_table() argument
677 smu7_reset_dpm_tables(struct pp_hwmgr *hwmgr) smu7_reset_dpm_tables() argument
719 smu7_setup_dpm_tables_v0(struct pp_hwmgr *hwmgr) smu7_setup_dpm_tables_v0() argument
805 smu7_setup_dpm_tables_v1(struct pp_hwmgr *hwmgr) smu7_setup_dpm_tables_v1() argument
870 smu7_odn_initial_default_setting(struct pp_hwmgr *hwmgr) smu7_odn_initial_default_setting() argument
915 smu7_setup_voltage_range_from_vbios(struct pp_hwmgr *hwmgr) smu7_setup_voltage_range_from_vbios() argument
943 smu7_check_dpm_table_updated(struct pp_hwmgr *hwmgr) smu7_check_dpm_table_updated() argument
997 smu7_setup_default_dpm_tables(struct pp_hwmgr *hwmgr) smu7_setup_default_dpm_tables() argument
1026 smu7_enable_vrhot_gpio_interrupt(struct pp_hwmgr *hwmgr) smu7_enable_vrhot_gpio_interrupt() argument
1038 smu7_enable_sclk_control(struct pp_hwmgr *hwmgr) smu7_enable_sclk_control() argument
1045 smu7_enable_ulv(struct pp_hwmgr *hwmgr) smu7_enable_ulv() argument
1055 smu7_disable_ulv(struct pp_hwmgr *hwmgr) smu7_disable_ulv() argument
1065 smu7_enable_deep_sleep_master_switch(struct pp_hwmgr *hwmgr) smu7_enable_deep_sleep_master_switch() argument
1086 smu7_disable_deep_sleep_master_switch(struct pp_hwmgr *hwmgr) smu7_disable_deep_sleep_master_switch() argument
1102 smu7_disable_sclk_vce_handshake(struct pp_hwmgr *hwmgr) smu7_disable_sclk_vce_handshake() argument
1118 smu7_disable_handshake_uvd(struct pp_hwmgr *hwmgr) smu7_disable_handshake_uvd() argument
1135 smu7_enable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) smu7_enable_sclk_mclk_dpm() argument
1193 smu7_start_dpm(struct pp_hwmgr *hwmgr) smu7_start_dpm() argument
1254 smu7_disable_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) smu7_disable_sclk_mclk_dpm() argument
1277 smu7_stop_dpm(struct pp_hwmgr *hwmgr) smu7_stop_dpm() argument
1309 smu7_set_dpm_event_sources(struct pp_hwmgr *hwmgr, uint32_t sources) smu7_set_dpm_event_sources() argument
1349 smu7_enable_auto_throttle_source(struct pp_hwmgr *hwmgr, PHM_AutoThrottleSource source) smu7_enable_auto_throttle_source() argument
1361 smu7_enable_thermal_auto_throttle(struct pp_hwmgr *hwmgr) smu7_enable_thermal_auto_throttle() argument
1366 smu7_disable_auto_throttle_source(struct pp_hwmgr *hwmgr, PHM_AutoThrottleSource source) smu7_disable_auto_throttle_source() argument
1378 smu7_disable_thermal_auto_throttle(struct pp_hwmgr *hwmgr) smu7_disable_thermal_auto_throttle() argument
1383 smu7_pcie_performance_request(struct pp_hwmgr *hwmgr) smu7_pcie_performance_request() argument
1391 smu7_enable_dpm_tasks(struct pp_hwmgr *hwmgr) smu7_enable_dpm_tasks() argument
1504 smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable) smu7_avfs_control() argument
1528 smu7_update_avfs(struct pp_hwmgr *hwmgr) smu7_update_avfs() argument
1547 smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr) smu7_disable_dpm_tasks() argument
1623 smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) smu7_init_dpm_defaults() argument
1784 smu7_get_evv_voltages(struct pp_hwmgr *hwmgr) smu7_get_evv_voltages() argument
1881 smu7_patch_ppt_v1_with_vdd_leakage(struct pp_hwmgr *hwmgr, uint16_t *voltage, struct smu7_leakage_voltage *leakage_table) smu7_patch_ppt_v1_with_vdd_leakage() argument
1908 smu7_patch_lookup_table_with_leakage(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *lookup_table, struct smu7_leakage_voltage *leakage_table) smu7_patch_lookup_table_with_leakage() argument
1921 smu7_patch_clock_voltage_limits_with_vddc_leakage( struct pp_hwmgr *hwmgr, struct smu7_leakage_voltage *leakage_table, uint16_t *vddc) smu7_patch_clock_voltage_limits_with_vddc_leakage() argument
1933 smu7_patch_voltage_dependency_tables_with_lookup_table( struct pp_hwmgr *hwmgr) smu7_patch_voltage_dependency_tables_with_lookup_table() argument
1979 phm_add_voltage(struct pp_hwmgr *hwmgr, phm_ppt_v1_voltage_lookup_table *look_up_table, phm_ppt_v1_voltage_lookup_record *record) phm_add_voltage() argument
2016 smu7_calc_voltage_dependency_tables(struct pp_hwmgr *hwmgr) smu7_calc_voltage_dependency_tables() argument
2058 smu7_calc_mm_voltage_dependency_table(struct pp_hwmgr *hwmgr) smu7_calc_mm_voltage_dependency_table() argument
2084 smu7_sort_lookup_table(struct pp_hwmgr *hwmgr, struct phm_ppt_v1_voltage_lookup_table *lookup_table) smu7_sort_lookup_table() argument
2107 smu7_complete_dependency_tables(struct pp_hwmgr *hwmgr) smu7_complete_dependency_tables() argument
2159 smu7_set_private_data_based_on_pptable_v1(struct pp_hwmgr *hwmgr) smu7_set_private_data_based_on_pptable_v1() argument
2200 smu7_patch_voltage_workaround(struct pp_hwmgr *hwmgr) smu7_patch_voltage_workaround() argument
2237 smu7_thermal_parameter_init(struct pp_hwmgr *hwmgr) smu7_thermal_parameter_init() argument
2331 smu7_patch_ppt_v0_with_vdd_leakage(struct pp_hwmgr *hwmgr, uint32_t *voltage, struct smu7_leakage_voltage *leakage_table) smu7_patch_ppt_v0_with_vdd_leakage() argument
2351 smu7_patch_vddc(struct pp_hwmgr *hwmgr, struct phm_clock_voltage_dependency_table *tab) smu7_patch_vddc() argument
2365 smu7_patch_vddci(struct pp_hwmgr *hwmgr, struct phm_clock_voltage_dependency_table *tab) smu7_patch_vddci() argument
2379 smu7_patch_vce_vddc(struct pp_hwmgr *hwmgr, struct phm_vce_clock_voltage_dependency_table *tab) smu7_patch_vce_vddc() argument
2394 smu7_patch_uvd_vddc(struct pp_hwmgr *hwmgr, struct phm_uvd_clock_voltage_dependency_table *tab) smu7_patch_uvd_vddc() argument
2408 smu7_patch_vddc_shed_limit(struct pp_hwmgr *hwmgr, struct phm_phase_shedding_limits_table *tab) smu7_patch_vddc_shed_limit() argument
2422 smu7_patch_samu_vddc(struct pp_hwmgr *hwmgr, struct phm_samu_clock_voltage_dependency_table *tab) smu7_patch_samu_vddc() argument
2436 smu7_patch_acp_vddc(struct pp_hwmgr *hwmgr, struct phm_acp_clock_voltage_dependency_table *tab) smu7_patch_acp_vddc() argument
2450 smu7_patch_limits_vddc(struct pp_hwmgr *hwmgr, struct phm_clock_and_voltage_limits *tab) smu7_patch_limits_vddc() argument
2470 smu7_patch_cac_vddc(struct pp_hwmgr *hwmgr, struct phm_cac_leakage_table *tab) smu7_patch_cac_vddc() argument
2487 smu7_patch_dependency_tables_with_leakage(struct pp_hwmgr *hwmgr) smu7_patch_dependency_tables_with_leakage() argument
2543 smu7_set_private_data_based_on_pptable_v0(struct pp_hwmgr *hwmgr) smu7_set_private_data_based_on_pptable_v0() argument
2586 smu7_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) smu7_hwmgr_backend_fini() argument
2596 smu7_get_elb_voltages(struct pp_hwmgr *hwmgr) smu7_get_elb_voltages() argument
2624 smu7_hwmgr_backend_init(struct pp_hwmgr *hwmgr) smu7_hwmgr_backend_init() argument
2688 smu7_force_dpm_highest(struct pp_hwmgr *hwmgr) smu7_force_dpm_highest() argument
2740 smu7_upload_dpm_level_enable_mask(struct pp_hwmgr *hwmgr) smu7_upload_dpm_level_enable_mask() argument
2767 smu7_unforce_dpm_levels(struct pp_hwmgr *hwmgr) smu7_unforce_dpm_levels() argument
2783 smu7_force_dpm_lowest(struct pp_hwmgr *hwmgr) smu7_force_dpm_lowest() argument
2825 smu7_get_profiling_clk(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *pcie_mask) smu7_get_profiling_clk() argument
2900 smu7_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) smu7_force_dpm_level() argument
2947 smu7_get_power_state_size(struct pp_hwmgr *hwmgr) smu7_get_power_state_size() argument
2952 smu7_vblank_too_short(struct pp_hwmgr *hwmgr, uint32_t vblank_time_us) smu7_vblank_too_short() argument
2981 smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *request_ps, const struct pp_power_state *current_ps) smu7_apply_state_adjust_rules() argument
3112 smu7_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) smu7_dpm_get_mclk() argument
3134 smu7_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) smu7_dpm_get_sclk() argument
3156 smu7_dpm_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) smu7_dpm_patch_boot_state() argument
3201 smu7_get_number_of_powerplay_table_entries(struct pp_hwmgr *hwmgr) smu7_get_number_of_powerplay_table_entries() argument
3216 smu7_get_pp_table_entry_callback_func_v1(struct pp_hwmgr *hwmgr, void *state, struct pp_power_state *power_state, void *pp_table, uint32_t classification_flag) smu7_get_pp_table_entry_callback_func_v1() argument
3314 smu7_get_pp_table_entry_v1(struct pp_hwmgr *hwmgr, unsigned long entry_index, struct pp_power_state *state) smu7_get_pp_table_entry_v1() argument
3416 smu7_get_pp_table_entry_callback_func_v0(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *power_state, unsigned int index, const void *clock_info) smu7_get_pp_table_entry_callback_func_v0() argument
3459 smu7_get_pp_table_entry_v0(struct pp_hwmgr *hwmgr, unsigned long entry_index, struct pp_power_state *state) smu7_get_pp_table_entry_v0() argument
3566 smu7_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry_index, struct pp_power_state *state) smu7_get_pp_table_entry() argument
3577 smu7_get_gpu_power(struct pp_hwmgr *hwmgr, u32 *query) smu7_get_gpu_power() argument
3622 smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) smu7_read_sensor() argument
3688 smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, const void *input) smu7_find_dpm_states_clocks_in_dpm_table() argument
3742 smu7_get_maximum_link_speed(struct pp_hwmgr *hwmgr, const struct smu7_power_state *smu7_ps) smu7_get_maximum_link_speed() argument
3767 smu7_request_link_speed_change_before_state_change( struct pp_hwmgr *hwmgr, const void *input) smu7_request_link_speed_change_before_state_change() argument
3816 smu7_freeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) smu7_freeze_sclk_mclk_dpm() argument
3852 smu7_populate_and_upload_sclk_mclk_dpm_levels( struct pp_hwmgr *hwmgr, const void *input) smu7_populate_and_upload_sclk_mclk_dpm_levels() argument
3900 smu7_trim_single_dpm_states(struct pp_hwmgr *hwmgr, struct smu7_single_dpm_table *dpm_table, uint32_t low_limit, uint32_t high_limit) smu7_trim_single_dpm_states() argument
3921 smu7_trim_dpm_states(struct pp_hwmgr *hwmgr, const struct smu7_power_state *smu7_ps) smu7_trim_dpm_states() argument
3946 smu7_generate_dpm_level_enable_mask( struct pp_hwmgr *hwmgr, const void *input) smu7_generate_dpm_level_enable_mask() argument
3971 smu7_unfreeze_sclk_mclk_dpm(struct pp_hwmgr *hwmgr) smu7_unfreeze_sclk_mclk_dpm() argument
4010 smu7_notify_link_speed_change_after_state_change( struct pp_hwmgr *hwmgr, const void *input) smu7_notify_link_speed_change_after_state_change() argument
4046 smu7_notify_smc_display(struct pp_hwmgr *hwmgr) smu7_notify_smc_display() argument
4063 smu7_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) smu7_set_power_state_tasks() argument
4140 smu7_set_max_fan_pwm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_fan_pwm) smu7_set_max_fan_pwm_output() argument
4151 smu7_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display) smu7_notify_smc_display_change() argument
4159 smu7_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr) smu7_notify_smc_display_config_after_ps_adjustment() argument
4174 smu7_program_display_gap(struct pp_hwmgr *hwmgr) smu7_program_display_gap() argument
4221 smu7_display_configuration_changed_task(struct pp_hwmgr *hwmgr) smu7_display_configuration_changed_task() argument
4233 smu7_set_max_fan_rpm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_fan_rpm) smu7_set_max_fan_rpm_output() argument
4247 smu7_register_irq_handlers(struct pp_hwmgr *hwmgr) smu7_register_irq_handlers() argument
4276 smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) smu7_check_smc_update_required_for_display_configuration() argument
4305 smu7_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal) smu7_check_states_equal() argument
4345 smu7_check_mc_firmware(struct pp_hwmgr *hwmgr) smu7_check_mc_firmware() argument
4383 smu7_read_clock_registers(struct pp_hwmgr *hwmgr) smu7_read_clock_registers() argument
4427 smu7_get_memory_type(struct pp_hwmgr *hwmgr) smu7_get_memory_type() argument
4443 smu7_enable_acpi_power_management(struct pp_hwmgr *hwmgr) smu7_enable_acpi_power_management() argument
4457 smu7_init_power_gate_state(struct pp_hwmgr *hwmgr) smu7_init_power_gate_state() argument
4467 smu7_init_sclk_threshold(struct pp_hwmgr *hwmgr) smu7_init_sclk_threshold() argument
4475 smu7_setup_asic_task(struct pp_hwmgr *hwmgr) smu7_setup_asic_task() argument
4508 smu7_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) smu7_force_clock_level() argument
4554 smu7_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) smu7_print_clock_levels() argument
4652 smu7_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode) smu7_set_fan_control_mode() argument
4672 smu7_get_fan_control_mode(struct pp_hwmgr *hwmgr) smu7_get_fan_control_mode() argument
4677 smu7_get_sclk_od(struct pp_hwmgr *hwmgr) smu7_get_sclk_od() argument
4693 smu7_set_sclk_od(struct pp_hwmgr *hwmgr, uint32_t value) smu7_set_sclk_od() argument
4719 smu7_get_mclk_od(struct pp_hwmgr *hwmgr) smu7_get_mclk_od() argument
4735 smu7_set_mclk_od(struct pp_hwmgr *hwmgr, uint32_t value) smu7_set_mclk_od() argument
4762 smu7_get_sclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks) smu7_get_sclks() argument
4787 smu7_get_mem_latency(struct pp_hwmgr *hwmgr, uint32_t clk) smu7_get_mem_latency() argument
4799 smu7_get_mclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks) smu7_get_mclks() argument
4826 smu7_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) smu7_get_clock_by_type() argument
4843 smu7_get_sclks_with_latency(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) smu7_get_sclks_with_latency() argument
4864 smu7_get_mclks_with_latency(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) smu7_get_mclks_with_latency() argument
4887 smu7_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) smu7_get_clock_by_type_with_latency() argument
4909 smu7_notify_cac_buffer_info(struct pp_hwmgr *hwmgr, uint32_t virtual_addr_low, uint32_t virtual_addr_hi, uint32_t mc_addr_low, uint32_t mc_addr_hi, uint32_t size) smu7_notify_cac_buffer_info() argument
4950 smu7_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) smu7_get_max_high_clocks() argument
4969 smu7_get_thermal_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *thermal_data) smu7_get_thermal_temperature_range() argument
4988 smu7_check_clk_voltage_valid(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, uint32_t clk, uint32_t voltage) smu7_check_clk_voltage_valid() argument
5025 smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, long *input, uint32_t size) smu7_odn_edit_dpm_table() argument
5092 smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) smu7_get_power_profile_mode() argument
5158 smu7_patch_compute_profile_mode(struct pp_hwmgr *hwmgr, enum PP_SMC_POWER_PROFILE requst) smu7_patch_compute_profile_mode() argument
5178 smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size) smu7_set_power_profile_mode() argument
5249 smu7_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) smu7_get_performance_level() argument
5270 smu7_power_off_asic(struct pp_hwmgr *hwmgr) smu7_power_off_asic() argument
5363 smu7_init_function_pointers(struct pp_hwmgr *hwmgr) smu7_init_function_pointers() argument
[all...]
H A Dsmu10_hwmgr.c32 #include "hwmgr.h"
51 static int smu10_display_clock_voltage_request(struct pp_hwmgr *hwmgr, in smu10_display_clock_voltage_request() argument
54 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_display_clock_voltage_request()
79 smum_send_msg_to_smc_with_parameter(hwmgr, msg, clk_freq, NULL); in smu10_display_clock_voltage_request()
101 static int smu10_initialize_dpm_defaults(struct pp_hwmgr *hwmgr) in smu10_initialize_dpm_defaults() argument
103 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_initialize_dpm_defaults()
113 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
116 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
119 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
124 static int smu10_construct_max_power_limits_table(struct pp_hwmgr *hwmgr, in smu10_construct_max_power_limits_table() argument
130 smu10_init_dynamic_state_adjustment_rule_settings( struct pp_hwmgr *hwmgr) smu10_init_dynamic_state_adjustment_rule_settings() argument
165 smu10_get_system_info_data(struct pp_hwmgr *hwmgr) smu10_get_system_info_data() argument
183 smu10_construct_boot_state(struct pp_hwmgr *hwmgr) smu10_construct_boot_state() argument
188 smu10_set_clock_limit(struct pp_hwmgr *hwmgr, const void *input) smu10_set_clock_limit() argument
203 smu10_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_min_deep_sleep_dcefclk() argument
217 smu10_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_hard_min_dcefclk_by_freq() argument
231 smu10_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_hard_min_fclk_by_freq() argument
245 smu10_set_hard_min_gfxclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_hard_min_gfxclk_by_freq() argument
259 smu10_set_soft_max_gfxclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_soft_max_gfxclk_by_freq() argument
273 smu10_set_active_display_count(struct pp_hwmgr *hwmgr, uint32_t count) smu10_set_active_display_count() argument
288 smu10_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) smu10_set_power_state_tasks() argument
293 smu10_init_power_gate_state(struct pp_hwmgr *hwmgr) smu10_init_power_gate_state() argument
312 smu10_setup_asic_task(struct pp_hwmgr *hwmgr) smu10_setup_asic_task() argument
317 smu10_reset_cc6_data(struct pp_hwmgr *hwmgr) smu10_reset_cc6_data() argument
329 smu10_power_off_asic(struct pp_hwmgr *hwmgr) smu10_power_off_asic() argument
334 smu10_is_gfx_on(struct pp_hwmgr *hwmgr) smu10_is_gfx_on() argument
347 smu10_disable_gfx_off(struct pp_hwmgr *hwmgr) smu10_disable_gfx_off() argument
362 smu10_disable_dpm_tasks(struct pp_hwmgr *hwmgr) smu10_disable_dpm_tasks() argument
367 smu10_enable_gfx_off(struct pp_hwmgr *hwmgr) smu10_enable_gfx_off() argument
377 smu10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) smu10_enable_dpm_tasks() argument
382 smu10_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable) smu10_gfx_off_control() argument
390 smu10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *prequest_ps, const struct pp_power_state *pcurrent_ps) smu10_apply_state_adjust_rules() argument
434 smu10_get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr, struct smu10_voltage_dependency_table **pptable, uint32_t num_entry, const DpmClock_t *pclk_dependency_table) smu10_get_clock_voltage_dependency_table() argument
459 smu10_populate_clock_table(struct pp_hwmgr *hwmgr) smu10_populate_clock_table() argument
514 smu10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) smu10_hwmgr_backend_init() argument
564 smu10_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) smu10_hwmgr_backend_fini() argument
591 smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) smu10_dpm_force_dpm_level() argument
768 smu10_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) smu10_dpm_get_mclk() argument
784 smu10_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) smu10_dpm_get_sclk() argument
799 smu10_dpm_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) smu10_dpm_patch_boot_state() argument
805 smu10_dpm_get_pp_table_entry_callback( struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps, unsigned int index, const void *clock_info) smu10_dpm_get_pp_table_entry_callback() argument
826 smu10_dpm_get_num_of_pp_table_entries(struct pp_hwmgr *hwmgr) smu10_dpm_get_num_of_pp_table_entries() argument
836 smu10_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry, struct pp_power_state *ps) smu10_dpm_get_pp_table_entry() argument
855 smu10_get_power_state_size(struct pp_hwmgr *hwmgr) smu10_get_power_state_size() argument
860 smu10_set_cpu_power_state(struct pp_hwmgr *hwmgr) smu10_set_cpu_power_state() argument
866 smu10_store_cc6_data(struct pp_hwmgr *hwmgr, uint32_t separation_time, bool cc6_disable, bool pstate_disable, bool pstate_switch_disable) smu10_store_cc6_data() argument
882 smu10_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) smu10_get_dal_power_level() argument
888 smu10_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) smu10_force_clock_level() argument
943 smu10_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) smu10_print_clock_levels() argument
1010 smu10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) smu10_get_performance_level() argument
1036 smu10_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) smu10_get_current_shallow_sleep_clocks() argument
1054 smu10_get_mem_latency(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_get_mem_latency() argument
1066 smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) smu10_get_clock_by_type_with_latency() argument
1123 smu10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_voltage *clocks) smu10_get_clock_by_type_with_voltage() argument
1175 smu10_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) smu10_get_max_high_clocks() argument
1181 smu10_thermal_get_temperature(struct pp_hwmgr *hwmgr) smu10_thermal_get_temperature() argument
1196 smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) smu10_read_sensor() argument
1231 smu10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_ranges) smu10_set_watermarks_for_clocks_ranges() argument
1255 smu10_smus_notify_pwe(struct pp_hwmgr *hwmgr) smu10_smus_notify_pwe() argument
1261 smu10_powergate_mmhub(struct pp_hwmgr *hwmgr) smu10_powergate_mmhub() argument
1266 smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate) smu10_powergate_sdma() argument
1274 smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate) smu10_powergate_vcn() argument
1320 smu10_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) smu10_get_power_profile_mode() argument
1360 smu10_is_raven1_refresh(struct pp_hwmgr *hwmgr) smu10_is_raven1_refresh() argument
1370 smu10_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size) smu10_set_power_profile_mode() argument
1404 smu10_asic_reset(struct pp_hwmgr *hwmgr, enum SMU_ASIC_RESET_MODE mode) smu10_asic_reset() argument
1412 smu10_set_fine_grain_clk_vol(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, long *input, uint32_t size) smu10_set_fine_grain_clk_vol() argument
1486 smu10_init_function_pointers(struct pp_hwmgr *hwmgr) smu10_init_function_pointers() argument
[all...]
H A Dsmu8_hwmgr.c35 #include "hwmgr.h"
68 static uint32_t smu8_get_eclk_level(struct pp_hwmgr *hwmgr, in smu8_get_eclk_level() argument
73 hwmgr->dyn_state.vce_clock_voltage_dependency_table; in smu8_get_eclk_level()
99 static uint32_t smu8_get_sclk_level(struct pp_hwmgr *hwmgr, in smu8_get_sclk_level() argument
104 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_get_sclk_level()
129 static uint32_t smu8_get_uvd_level(struct pp_hwmgr *hwmgr, in smu8_get_uvd_level() argument
134 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_get_uvd_level()
160 static uint32_t smu8_get_max_sclk_level(struct pp_hwmgr *hwmgr) in smu8_get_max_sclk_level() argument
162 struct smu8_hwmgr *data = hwmgr->backend; in smu8_get_max_sclk_level()
165 smum_send_msg_to_smc(hwmgr, in smu8_get_max_sclk_level()
174 smu8_initialize_dpm_defaults(struct pp_hwmgr *hwmgr) smu8_initialize_dpm_defaults() argument
250 smu8_convert_8Bit_index_to_voltage( struct pp_hwmgr *hwmgr, uint16_t voltage) smu8_convert_8Bit_index_to_voltage() argument
256 smu8_construct_max_power_limits_table(struct pp_hwmgr *hwmgr, struct phm_clock_and_voltage_limits *table) smu8_construct_max_power_limits_table() argument
273 smu8_init_dynamic_state_adjustment_rule_settings( struct pp_hwmgr *hwmgr, ATOM_CLK_VOLT_CAPABILITY *disp_voltage_table) smu8_init_dynamic_state_adjustment_rule_settings() argument
309 smu8_get_system_info_data(struct pp_hwmgr *hwmgr) smu8_get_system_info_data() argument
413 smu8_construct_boot_state(struct pp_hwmgr *hwmgr) smu8_construct_boot_state() argument
435 smu8_upload_pptable_to_smu(struct pp_hwmgr *hwmgr) smu8_upload_pptable_to_smu() argument
554 smu8_init_sclk_limit(struct pp_hwmgr *hwmgr) smu8_init_sclk_limit() argument
580 smu8_init_uvd_limit(struct pp_hwmgr *hwmgr) smu8_init_uvd_limit() argument
607 smu8_init_vce_limit(struct pp_hwmgr *hwmgr) smu8_init_vce_limit() argument
634 smu8_init_acp_limit(struct pp_hwmgr *hwmgr) smu8_init_acp_limit() argument
660 smu8_init_power_gate_state(struct pp_hwmgr *hwmgr) smu8_init_power_gate_state() argument
676 smu8_init_sclk_threshold(struct pp_hwmgr *hwmgr) smu8_init_sclk_threshold() argument
683 smu8_update_sclk_limit(struct pp_hwmgr *hwmgr) smu8_update_sclk_limit() argument
756 smu8_set_deep_sleep_sclk_threshold(struct pp_hwmgr *hwmgr) smu8_set_deep_sleep_sclk_threshold() argument
775 smu8_set_watermark_threshold(struct pp_hwmgr *hwmgr) smu8_set_watermark_threshold() argument
788 smu8_nbdpm_pstate_enable_disable(struct pp_hwmgr *hwmgr, bool enable, bool lock) smu8_nbdpm_pstate_enable_disable() argument
813 smu8_disable_nb_dpm(struct pp_hwmgr *hwmgr) smu8_disable_nb_dpm() argument
835 smu8_enable_nb_dpm(struct pp_hwmgr *hwmgr) smu8_enable_nb_dpm() argument
857 smu8_update_low_mem_pstate(struct pp_hwmgr *hwmgr, const void *input) smu8_update_low_mem_pstate() argument
879 smu8_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) smu8_set_power_state_tasks() argument
895 smu8_setup_asic_task(struct pp_hwmgr *hwmgr) smu8_setup_asic_task() argument
921 smu8_power_up_display_clock_sys_pll(struct pp_hwmgr *hwmgr) smu8_power_up_display_clock_sys_pll() argument
929 smu8_clear_nb_dpm_flag(struct pp_hwmgr *hwmgr) smu8_clear_nb_dpm_flag() argument
936 smu8_reset_cc6_data(struct pp_hwmgr *hwmgr) smu8_reset_cc6_data() argument
946 smu8_program_voting_clients(struct pp_hwmgr *hwmgr) smu8_program_voting_clients() argument
953 smu8_clear_voting_clients(struct pp_hwmgr *hwmgr) smu8_clear_voting_clients() argument
959 smu8_start_dpm(struct pp_hwmgr *hwmgr) smu8_start_dpm() argument
971 smu8_stop_dpm(struct pp_hwmgr *hwmgr) smu8_stop_dpm() argument
988 smu8_program_bootup_state(struct pp_hwmgr *hwmgr) smu8_program_bootup_state() argument
1012 smu8_reset_acp_boot_level(struct pp_hwmgr *hwmgr) smu8_reset_acp_boot_level() argument
1019 smu8_enable_dpm_tasks(struct pp_hwmgr *hwmgr) smu8_enable_dpm_tasks() argument
1030 smu8_disable_dpm_tasks(struct pp_hwmgr *hwmgr) smu8_disable_dpm_tasks() argument
1041 smu8_power_off_asic(struct pp_hwmgr *hwmgr) smu8_power_off_asic() argument
1050 smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *prequest_ps, const struct pp_power_state *pcurrent_ps) smu8_apply_state_adjust_rules() argument
1095 smu8_hwmgr_backend_init(struct pp_hwmgr *hwmgr) smu8_hwmgr_backend_init() argument
1125 smu8_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) smu8_hwmgr_backend_fini() argument
1137 smu8_phm_force_dpm_highest(struct pp_hwmgr *hwmgr) smu8_phm_force_dpm_highest() argument
1158 smu8_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr) smu8_phm_unforce_dpm_levels() argument
1200 smu8_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr) smu8_phm_force_dpm_lowest() argument
1221 smu8_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) smu8_dpm_force_dpm_level() argument
1248 smu8_dpm_powerdown_uvd(struct pp_hwmgr *hwmgr) smu8_dpm_powerdown_uvd() argument
1255 smu8_dpm_powerup_uvd(struct pp_hwmgr *hwmgr) smu8_dpm_powerup_uvd() argument
1268 smu8_dpm_update_vce_dpm(struct pp_hwmgr *hwmgr) smu8_dpm_update_vce_dpm() argument
1302 smu8_dpm_powerdown_vce(struct pp_hwmgr *hwmgr) smu8_dpm_powerdown_vce() argument
1311 smu8_dpm_powerup_vce(struct pp_hwmgr *hwmgr) smu8_dpm_powerup_vce() argument
1320 smu8_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) smu8_dpm_get_mclk() argument
1327 smu8_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) smu8_dpm_get_sclk() argument
1348 smu8_dpm_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) smu8_dpm_patch_boot_state() argument
1362 smu8_dpm_get_pp_table_entry_callback( struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps, unsigned int index, const void *clock_info) smu8_dpm_get_pp_table_entry_callback() argument
1392 smu8_dpm_get_num_of_pp_table_entries(struct pp_hwmgr *hwmgr) smu8_dpm_get_num_of_pp_table_entries() argument
1402 smu8_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry, struct pp_power_state *ps) smu8_dpm_get_pp_table_entry() argument
1421 smu8_get_power_state_size(struct pp_hwmgr *hwmgr) smu8_get_power_state_size() argument
1441 smu8_set_cpu_power_state(struct pp_hwmgr *hwmgr) smu8_set_cpu_power_state() argument
1475 smu8_store_cc6_data(struct pp_hwmgr *hwmgr, uint32_t separation_time, bool cc6_disable, bool pstate_disable, bool pstate_switch_disable) smu8_store_cc6_data() argument
1502 smu8_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) smu8_get_dal_power_level() argument
1523 smu8_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) smu8_force_clock_level() argument
1544 smu8_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) smu8_print_clock_levels() argument
1583 smu8_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) smu8_get_performance_level() argument
1622 smu8_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) smu8_get_current_shallow_sleep_clocks() argument
1633 smu8_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) smu8_get_clock_by_type() argument
1663 smu8_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) smu8_get_max_high_clocks() argument
1686 smu8_thermal_get_temperature(struct pp_hwmgr *hwmgr) smu8_thermal_get_temperature() argument
1701 smu8_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) smu8_read_sensor() argument
1812 smu8_notify_cac_buffer_info(struct pp_hwmgr *hwmgr, uint32_t virtual_addr_low, uint32_t virtual_addr_hi, uint32_t mc_addr_low, uint32_t mc_addr_hi, uint32_t size) smu8_notify_cac_buffer_info() argument
1843 smu8_get_thermal_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *thermal_data) smu8_get_thermal_temperature_range() argument
1857 smu8_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) smu8_enable_disable_uvd_dpm() argument
1882 smu8_dpm_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate) smu8_dpm_update_uvd_dpm() argument
1913 smu8_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) smu8_enable_disable_vce_dpm() argument
1940 smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate) smu8_dpm_powergate_acp() argument
1953 smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) smu8_dpm_powergate_uvd() argument
1981 smu8_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) smu8_dpm_powergate_vce() argument
2044 smu8_init_function_pointers(struct pp_hwmgr *hwmgr) smu8_init_function_pointers() argument
[all...]
H A Dsmu7_clockpowergating.c28 static int smu7_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) in smu7_enable_disable_uvd_dpm() argument
30 return smum_send_msg_to_smc(hwmgr, enable ? in smu7_enable_disable_uvd_dpm()
36 static int smu7_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) in smu7_enable_disable_vce_dpm() argument
38 return smum_send_msg_to_smc(hwmgr, enable ? in smu7_enable_disable_vce_dpm()
44 static int smu7_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate) in smu7_update_uvd_dpm() argument
47 smum_update_smc_table(hwmgr, SMU_UVD_TABLE); in smu7_update_uvd_dpm()
48 return smu7_enable_disable_uvd_dpm(hwmgr, !bgate); in smu7_update_uvd_dpm()
51 static int smu7_update_vce_dpm(struct pp_hwmgr *hwmgr, bool bgate) in smu7_update_vce_dpm() argument
54 smum_update_smc_table(hwmgr, SMU_VCE_TABLE); in smu7_update_vce_dpm()
55 return smu7_enable_disable_vce_dpm(hwmgr, !bgat in smu7_update_vce_dpm()
58 smu7_powerdown_uvd(struct pp_hwmgr *hwmgr) smu7_powerdown_uvd() argument
67 smu7_powerup_uvd(struct pp_hwmgr *hwmgr) smu7_powerup_uvd() argument
83 smu7_powerdown_vce(struct pp_hwmgr *hwmgr) smu7_powerdown_vce() argument
92 smu7_powerup_vce(struct pp_hwmgr *hwmgr) smu7_powerup_vce() argument
101 smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr) smu7_disable_clock_power_gating() argument
114 smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) smu7_powergate_uvd() argument
142 smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) smu7_powergate_vce() argument
169 smu7_update_clock_gatings(struct pp_hwmgr *hwmgr, const uint32_t *msg_id) smu7_update_clock_gatings() argument
424 smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable) smu7_powergate_gfx() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dhwmgr.c32 #include "hwmgr.h"
50 extern int smu10_init_function_pointers(struct pp_hwmgr *hwmgr);
52 static int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr);
53 static void hwmgr_init_default_caps(struct pp_hwmgr *hwmgr);
54 static int hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr);
55 static int fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr);
56 static int tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr);
57 static int topaz_set_asic_special_caps(struct pp_hwmgr *hwmgr);
58 static int ci_set_asic_special_caps(struct pp_hwmgr *hwmgr);
61 static void hwmgr_init_workload_prority(struct pp_hwmgr *hwmgr) in hwmgr_init_workload_prority() argument
78 hwmgr_early_init(struct pp_hwmgr *hwmgr) hwmgr_early_init() argument
196 hwmgr_sw_init(struct pp_hwmgr *hwmgr) hwmgr_sw_init() argument
208 hwmgr_sw_fini(struct pp_hwmgr *hwmgr) hwmgr_sw_fini() argument
216 hwmgr_hw_init(struct pp_hwmgr *hwmgr) hwmgr_hw_init() argument
279 hwmgr_hw_fini(struct pp_hwmgr *hwmgr) hwmgr_hw_fini() argument
297 hwmgr_suspend(struct pp_hwmgr *hwmgr) hwmgr_suspend() argument
316 hwmgr_resume(struct pp_hwmgr *hwmgr) hwmgr_resume() argument
357 hwmgr_handle_task(struct pp_hwmgr *hwmgr, enum amd_pp_task task_id, enum amd_pm_state_type *user_state) hwmgr_handle_task() argument
409 hwmgr_init_default_caps(struct pp_hwmgr *hwmgr) hwmgr_init_default_caps() argument
441 hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr) hwmgr_set_user_specify_caps() argument
468 polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr) polaris_set_asic_special_caps() argument
501 fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr) fiji_set_asic_special_caps() argument
516 tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr) tonga_set_asic_special_caps() argument
536 topaz_set_asic_special_caps(struct pp_hwmgr *hwmgr) topaz_set_asic_special_caps() argument
551 ci_set_asic_special_caps(struct pp_hwmgr *hwmgr) ci_set_asic_special_caps() argument
[all...]
H A Dhardwaremanager.c25 #include "hwmgr.h"
39 int phm_setup_asic(struct pp_hwmgr *hwmgr) in phm_setup_asic() argument
41 PHM_FUNC_CHECK(hwmgr); in phm_setup_asic()
43 if (NULL != hwmgr->hwmgr_func->asic_setup) in phm_setup_asic()
44 return hwmgr->hwmgr_func->asic_setup(hwmgr); in phm_setup_asic()
49 int phm_power_down_asic(struct pp_hwmgr *hwmgr) in phm_power_down_asic() argument
51 PHM_FUNC_CHECK(hwmgr); in phm_power_down_asic()
53 if (NULL != hwmgr->hwmgr_func->power_off_asic) in phm_power_down_asic()
54 return hwmgr in phm_power_down_asic()
59 phm_set_power_state(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pcurrent_state, const struct pp_hw_power_state *pnew_power_state) phm_set_power_state() argument
76 phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr) phm_enable_dynamic_state_management() argument
97 phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr) phm_disable_dynamic_state_management() argument
117 phm_force_dpm_levels(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) phm_force_dpm_levels() argument
129 phm_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *adjusted_ps, const struct pp_power_state *current_ps) phm_apply_state_adjust_rules() argument
143 phm_apply_clock_adjust_rules(struct pp_hwmgr *hwmgr) phm_apply_clock_adjust_rules() argument
152 phm_powerdown_uvd(struct pp_hwmgr *hwmgr) phm_powerdown_uvd() argument
162 phm_disable_clock_power_gatings(struct pp_hwmgr *hwmgr) phm_disable_clock_power_gatings() argument
172 phm_pre_display_configuration_changed(struct pp_hwmgr *hwmgr) phm_pre_display_configuration_changed() argument
183 phm_display_configuration_changed(struct pp_hwmgr *hwmgr) phm_display_configuration_changed() argument
193 phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr) phm_notify_smc_display_config_after_ps_adjustment() argument
203 phm_stop_thermal_controller(struct pp_hwmgr *hwmgr) phm_stop_thermal_controller() argument
216 phm_register_irq_handlers(struct pp_hwmgr *hwmgr) phm_register_irq_handlers() argument
232 phm_start_thermal_controller(struct pp_hwmgr *hwmgr) phm_start_thermal_controller() argument
275 phm_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) phm_check_smc_update_required_for_display_configuration() argument
291 phm_check_states_equal(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *pstate1, const struct pp_hw_power_state *pstate2, bool *equal) phm_check_states_equal() argument
304 phm_store_dal_configuration_data(struct pp_hwmgr *hwmgr, const struct amd_pp_display_configuration *display_config) phm_store_dal_configuration_data() argument
341 phm_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) phm_get_dal_power_level() argument
351 phm_set_cpu_power_state(struct pp_hwmgr *hwmgr) phm_set_cpu_power_state() argument
362 phm_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) phm_get_performance_level() argument
385 phm_get_clock_info(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *pclock_info, PHM_PerformanceLevelDesignation designation) phm_get_clock_info() argument
418 phm_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) phm_get_current_shallow_sleep_clocks() argument
429 phm_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) phm_get_clock_by_type() argument
440 phm_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) phm_get_clock_by_type_with_latency() argument
453 phm_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_voltage *clocks) phm_get_clock_by_type_with_voltage() argument
466 phm_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_ranges) phm_set_watermarks_for_clocks_ranges() argument
478 phm_display_clock_voltage_request(struct pp_hwmgr *hwmgr, struct pp_display_clock_request *clock) phm_display_clock_voltage_request() argument
489 phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) phm_get_max_high_clocks() argument
499 phm_disable_smc_firmware_ctf(struct pp_hwmgr *hwmgr) phm_disable_smc_firmware_ctf() argument
512 phm_set_active_display_count(struct pp_hwmgr *hwmgr, uint32_t count) phm_set_active_display_count() argument
[all...]
H A Dsmu7_thermal.c29 int smu7_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, in smu7_fan_ctrl_get_fan_speed_info() argument
32 if (hwmgr->thermal_controller.fanInfo.bNoFan) in smu7_fan_ctrl_get_fan_speed_info()
41 hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution) { in smu7_fan_ctrl_get_fan_speed_info()
44 fan_speed_info->min_rpm = hwmgr->thermal_controller.fanInfo.ulMinRPM; in smu7_fan_ctrl_get_fan_speed_info()
45 fan_speed_info->max_rpm = hwmgr->thermal_controller.fanInfo.ulMaxRPM; in smu7_fan_ctrl_get_fan_speed_info()
54 int smu7_fan_ctrl_get_fan_speed_pwm(struct pp_hwmgr *hwmgr, in smu7_fan_ctrl_get_fan_speed_pwm() argument
61 if (hwmgr->thermal_controller.fanInfo.bNoFan) in smu7_fan_ctrl_get_fan_speed_pwm()
64 duty100 = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in smu7_fan_ctrl_get_fan_speed_pwm()
66 duty = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in smu7_fan_ctrl_get_fan_speed_pwm()
80 int smu7_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_ argument
108 smu7_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode) smu7_fan_ctrl_set_static_mode() argument
133 smu7_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr) smu7_fan_ctrl_set_default_mode() argument
146 smu7_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) smu7_fan_ctrl_start_smc_fan_control() argument
192 smu7_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr) smu7_fan_ctrl_stop_smc_fan_control() argument
203 smu7_fan_ctrl_set_fan_speed_pwm(struct pp_hwmgr *hwmgr, uint32_t speed) smu7_fan_ctrl_set_fan_speed_pwm() argument
239 smu7_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr) smu7_fan_ctrl_reset_fan_speed_to_default() argument
262 smu7_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) smu7_fan_ctrl_set_fan_speed_rpm() argument
293 smu7_thermal_get_temperature(struct pp_hwmgr *hwmgr) smu7_thermal_get_temperature() argument
319 smu7_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, int low_temp, int high_temp) smu7_thermal_set_temperature_range() argument
353 smu7_thermal_initialize(struct pp_hwmgr *hwmgr) smu7_thermal_initialize() argument
372 smu7_thermal_enable_alert(struct pp_hwmgr *hwmgr) smu7_thermal_enable_alert() argument
390 smu7_thermal_disable_alert(struct pp_hwmgr *hwmgr) smu7_thermal_disable_alert() argument
409 smu7_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr) smu7_thermal_stop_thermal_controller() argument
424 smu7_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr) smu7_thermal_start_smc_fan_control() argument
439 smu7_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range) smu7_start_thermal_controller() argument
468 smu7_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr) smu7_thermal_ctrl_uninitialize_thermal_controller() argument
[all...]
H A Dpp_psm.c29 int psm_init_power_state_table(struct pp_hwmgr *hwmgr) in psm_init_power_state_table() argument
37 if (hwmgr->hwmgr_func->get_num_of_pp_table_entries == NULL) in psm_init_power_state_table()
40 if (hwmgr->hwmgr_func->get_power_state_size == NULL) in psm_init_power_state_table()
43 hwmgr->num_ps = table_entries = hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr); in psm_init_power_state_table()
45 hwmgr->ps_size = size = hwmgr->hwmgr_func->get_power_state_size(hwmgr) + in psm_init_power_state_table()
53 hwmgr in psm_init_power_state_table()
103 psm_fini_power_state_table(struct pp_hwmgr *hwmgr) psm_fini_power_state_table() argument
120 psm_get_ui_state(struct pp_hwmgr *hwmgr, enum PP_StateUILabel ui_label, unsigned long *state_id) psm_get_ui_state() argument
141 psm_get_state_by_classification(struct pp_hwmgr *hwmgr, enum PP_StateClassificationFlag flag, unsigned long *state_id) psm_get_state_by_classification() argument
162 psm_set_states(struct pp_hwmgr *hwmgr, unsigned long state_id) psm_set_states() argument
182 psm_set_boot_states(struct pp_hwmgr *hwmgr) psm_set_boot_states() argument
197 psm_set_performance_states(struct pp_hwmgr *hwmgr) psm_set_performance_states() argument
212 psm_set_user_performance_state(struct pp_hwmgr *hwmgr, enum PP_StateUILabel label_id, struct pp_power_state **state) psm_set_user_performance_state() argument
243 power_state_management(struct pp_hwmgr *hwmgr, struct pp_power_state *new_ps) power_state_management() argument
268 psm_adjust_power_state_dynamic(struct pp_hwmgr *hwmgr, bool skip_display_settings, struct pp_power_state *new_ps) psm_adjust_power_state_dynamic() argument
[all...]
H A Dsmu10_hwmgr.c32 #include "hwmgr.h"
51 static int smu10_display_clock_voltage_request(struct pp_hwmgr *hwmgr, in smu10_display_clock_voltage_request() argument
54 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_display_clock_voltage_request()
79 smum_send_msg_to_smc_with_parameter(hwmgr, msg, clk_freq, NULL); in smu10_display_clock_voltage_request()
101 static int smu10_initialize_dpm_defaults(struct pp_hwmgr *hwmgr) in smu10_initialize_dpm_defaults() argument
103 struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); in smu10_initialize_dpm_defaults()
113 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
116 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
119 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
124 static int smu10_construct_max_power_limits_table(struct pp_hwmgr *hwmgr, in smu10_construct_max_power_limits_table() argument
130 smu10_init_dynamic_state_adjustment_rule_settings( struct pp_hwmgr *hwmgr) smu10_init_dynamic_state_adjustment_rule_settings() argument
166 smu10_get_system_info_data(struct pp_hwmgr *hwmgr) smu10_get_system_info_data() argument
184 smu10_construct_boot_state(struct pp_hwmgr *hwmgr) smu10_construct_boot_state() argument
189 smu10_set_clock_limit(struct pp_hwmgr *hwmgr, const void *input) smu10_set_clock_limit() argument
204 smu10_set_min_deep_sleep_dcefclk(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_min_deep_sleep_dcefclk() argument
218 smu10_set_hard_min_dcefclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_hard_min_dcefclk_by_freq() argument
232 smu10_set_hard_min_fclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_hard_min_fclk_by_freq() argument
246 smu10_set_hard_min_gfxclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_hard_min_gfxclk_by_freq() argument
260 smu10_set_soft_max_gfxclk_by_freq(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_set_soft_max_gfxclk_by_freq() argument
274 smu10_set_active_display_count(struct pp_hwmgr *hwmgr, uint32_t count) smu10_set_active_display_count() argument
289 smu10_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) smu10_set_power_state_tasks() argument
294 smu10_init_power_gate_state(struct pp_hwmgr *hwmgr) smu10_init_power_gate_state() argument
313 smu10_setup_asic_task(struct pp_hwmgr *hwmgr) smu10_setup_asic_task() argument
318 smu10_reset_cc6_data(struct pp_hwmgr *hwmgr) smu10_reset_cc6_data() argument
330 smu10_power_off_asic(struct pp_hwmgr *hwmgr) smu10_power_off_asic() argument
335 smu10_is_gfx_on(struct pp_hwmgr *hwmgr) smu10_is_gfx_on() argument
348 smu10_disable_gfx_off(struct pp_hwmgr *hwmgr) smu10_disable_gfx_off() argument
363 smu10_disable_dpm_tasks(struct pp_hwmgr *hwmgr) smu10_disable_dpm_tasks() argument
368 smu10_enable_gfx_off(struct pp_hwmgr *hwmgr) smu10_enable_gfx_off() argument
378 smu10_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr) smu10_populate_umdpstate_clocks() argument
389 smu10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) smu10_enable_dpm_tasks() argument
417 smu10_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable) smu10_gfx_off_control() argument
425 smu10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *prequest_ps, const struct pp_power_state *pcurrent_ps) smu10_apply_state_adjust_rules() argument
469 smu10_get_clock_voltage_dependency_table(struct pp_hwmgr *hwmgr, struct smu10_voltage_dependency_table **pptable, uint32_t num_entry, const DpmClock_t *pclk_dependency_table) smu10_get_clock_voltage_dependency_table() argument
494 smu10_populate_clock_table(struct pp_hwmgr *hwmgr) smu10_populate_clock_table() argument
549 smu10_hwmgr_backend_init(struct pp_hwmgr *hwmgr) smu10_hwmgr_backend_init() argument
597 smu10_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) smu10_hwmgr_backend_fini() argument
624 smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) smu10_dpm_force_dpm_level() argument
852 smu10_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) smu10_dpm_get_mclk() argument
868 smu10_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) smu10_dpm_get_sclk() argument
883 smu10_dpm_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) smu10_dpm_patch_boot_state() argument
889 smu10_dpm_get_pp_table_entry_callback( struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps, unsigned int index, const void *clock_info) smu10_dpm_get_pp_table_entry_callback() argument
910 smu10_dpm_get_num_of_pp_table_entries(struct pp_hwmgr *hwmgr) smu10_dpm_get_num_of_pp_table_entries() argument
920 smu10_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry, struct pp_power_state *ps) smu10_dpm_get_pp_table_entry() argument
939 smu10_get_power_state_size(struct pp_hwmgr *hwmgr) smu10_get_power_state_size() argument
944 smu10_set_cpu_power_state(struct pp_hwmgr *hwmgr) smu10_set_cpu_power_state() argument
950 smu10_store_cc6_data(struct pp_hwmgr *hwmgr, uint32_t separation_time, bool cc6_disable, bool pstate_disable, bool pstate_switch_disable) smu10_store_cc6_data() argument
966 smu10_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) smu10_get_dal_power_level() argument
972 smu10_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) smu10_force_clock_level() argument
1027 smu10_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) smu10_print_clock_levels() argument
1106 smu10_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) smu10_get_performance_level() argument
1132 smu10_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) smu10_get_current_shallow_sleep_clocks() argument
1150 smu10_get_mem_latency(struct pp_hwmgr *hwmgr, uint32_t clock) smu10_get_mem_latency() argument
1162 smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) smu10_get_clock_by_type_with_latency() argument
1219 smu10_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_voltage *clocks) smu10_get_clock_by_type_with_voltage() argument
1271 smu10_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) smu10_get_max_high_clocks() argument
1277 smu10_thermal_get_temperature(struct pp_hwmgr *hwmgr) smu10_thermal_get_temperature() argument
1292 smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) smu10_read_sensor() argument
1352 smu10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_ranges) smu10_set_watermarks_for_clocks_ranges() argument
1376 smu10_smus_notify_pwe(struct pp_hwmgr *hwmgr) smu10_smus_notify_pwe() argument
1382 smu10_powergate_mmhub(struct pp_hwmgr *hwmgr) smu10_powergate_mmhub() argument
1387 smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate) smu10_powergate_sdma() argument
1395 smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate) smu10_powergate_vcn() argument
1441 smu10_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf) smu10_get_power_profile_mode() argument
1476 smu10_is_raven1_refresh(struct pp_hwmgr *hwmgr) smu10_is_raven1_refresh() argument
1486 smu10_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size) smu10_set_power_profile_mode() argument
1520 smu10_asic_reset(struct pp_hwmgr *hwmgr, enum SMU_ASIC_RESET_MODE mode) smu10_asic_reset() argument
1528 smu10_set_fine_grain_clk_vol(struct pp_hwmgr *hwmgr, enum PP_OD_DPM_TABLE_COMMAND type, long *input, uint32_t size) smu10_set_fine_grain_clk_vol() argument
1613 smu10_gfx_state_change(struct pp_hwmgr *hwmgr, uint32_t state) smu10_gfx_state_change() argument
1669 smu10_init_function_pointers(struct pp_hwmgr *hwmgr) smu10_init_function_pointers() argument
[all...]
H A Dvega10_thermal.c32 static int vega10_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm) in vega10_get_current_rpm() argument
34 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentRpm, current_rpm); in vega10_get_current_rpm()
38 int vega10_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, in vega10_fan_ctrl_get_fan_speed_info() argument
42 if (hwmgr->thermal_controller.fanInfo.bNoFan) in vega10_fan_ctrl_get_fan_speed_info()
51 hwmgr->thermal_controller.fanInfo. in vega10_fan_ctrl_get_fan_speed_info()
56 hwmgr->thermal_controller.fanInfo.ulMinRPM; in vega10_fan_ctrl_get_fan_speed_info()
58 hwmgr->thermal_controller.fanInfo.ulMaxRPM; in vega10_fan_ctrl_get_fan_speed_info()
67 int vega10_fan_ctrl_get_fan_speed_pwm(struct pp_hwmgr *hwmgr, in vega10_fan_ctrl_get_fan_speed_pwm() argument
70 struct amdgpu_device *adev = hwmgr->adev; in vega10_fan_ctrl_get_fan_speed_pwm()
89 int vega10_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_ argument
126 vega10_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode) vega10_fan_ctrl_set_static_mode() argument
155 vega10_fan_ctrl_set_default_mode(struct pp_hwmgr *hwmgr) vega10_fan_ctrl_set_default_mode() argument
180 vega10_enable_fan_control_feature(struct pp_hwmgr *hwmgr) vega10_enable_fan_control_feature() argument
197 vega10_disable_fan_control_feature(struct pp_hwmgr *hwmgr) vega10_disable_fan_control_feature() argument
214 vega10_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr) vega10_fan_ctrl_start_smc_fan_control() argument
227 vega10_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr) vega10_fan_ctrl_stop_smc_fan_control() argument
247 vega10_fan_ctrl_set_fan_speed_pwm(struct pp_hwmgr *hwmgr, uint32_t speed) vega10_fan_ctrl_set_fan_speed_pwm() argument
285 vega10_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr) vega10_fan_ctrl_reset_fan_speed_to_default() argument
302 vega10_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed) vega10_fan_ctrl_set_fan_speed_rpm() argument
334 vega10_thermal_get_temperature(struct pp_hwmgr *hwmgr) vega10_thermal_get_temperature() argument
359 vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range) vega10_thermal_set_temperature_range() argument
409 vega10_thermal_initialize(struct pp_hwmgr *hwmgr) vega10_thermal_initialize() argument
432 vega10_thermal_enable_alert(struct pp_hwmgr *hwmgr) vega10_thermal_enable_alert() argument
463 vega10_thermal_disable_alert(struct pp_hwmgr *hwmgr) vega10_thermal_disable_alert() argument
491 vega10_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr) vega10_thermal_stop_thermal_controller() argument
506 vega10_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) vega10_thermal_setup_fan_table() argument
563 vega10_enable_mgpu_fan_boost(struct pp_hwmgr *hwmgr) vega10_enable_mgpu_fan_boost() argument
605 vega10_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr) vega10_thermal_start_smc_fan_control() argument
619 vega10_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range) vega10_start_thermal_controller() argument
650 vega10_thermal_ctrl_uninitialize_thermal_controller(struct pp_hwmgr *hwmgr) vega10_thermal_ctrl_uninitialize_thermal_controller() argument
[all...]
H A Dsmu8_hwmgr.c35 #include "hwmgr.h"
68 static uint32_t smu8_get_eclk_level(struct pp_hwmgr *hwmgr, in smu8_get_eclk_level() argument
73 hwmgr->dyn_state.vce_clock_voltage_dependency_table; in smu8_get_eclk_level()
99 static uint32_t smu8_get_sclk_level(struct pp_hwmgr *hwmgr, in smu8_get_sclk_level() argument
104 hwmgr->dyn_state.vddc_dependency_on_sclk; in smu8_get_sclk_level()
129 static uint32_t smu8_get_uvd_level(struct pp_hwmgr *hwmgr, in smu8_get_uvd_level() argument
134 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_get_uvd_level()
160 static uint32_t smu8_get_max_sclk_level(struct pp_hwmgr *hwmgr) in smu8_get_max_sclk_level() argument
162 struct smu8_hwmgr *data = hwmgr->backend; in smu8_get_max_sclk_level()
165 smum_send_msg_to_smc(hwmgr, in smu8_get_max_sclk_level()
174 smu8_initialize_dpm_defaults(struct pp_hwmgr *hwmgr) smu8_initialize_dpm_defaults() argument
250 smu8_convert_8Bit_index_to_voltage( struct pp_hwmgr *hwmgr, uint16_t voltage) smu8_convert_8Bit_index_to_voltage() argument
256 smu8_construct_max_power_limits_table(struct pp_hwmgr *hwmgr, struct phm_clock_and_voltage_limits *table) smu8_construct_max_power_limits_table() argument
273 smu8_init_dynamic_state_adjustment_rule_settings( struct pp_hwmgr *hwmgr, ATOM_CLK_VOLT_CAPABILITY *disp_voltage_table) smu8_init_dynamic_state_adjustment_rule_settings() argument
309 smu8_get_system_info_data(struct pp_hwmgr *hwmgr) smu8_get_system_info_data() argument
413 smu8_construct_boot_state(struct pp_hwmgr *hwmgr) smu8_construct_boot_state() argument
435 smu8_upload_pptable_to_smu(struct pp_hwmgr *hwmgr) smu8_upload_pptable_to_smu() argument
554 smu8_init_sclk_limit(struct pp_hwmgr *hwmgr) smu8_init_sclk_limit() argument
580 smu8_init_uvd_limit(struct pp_hwmgr *hwmgr) smu8_init_uvd_limit() argument
607 smu8_init_vce_limit(struct pp_hwmgr *hwmgr) smu8_init_vce_limit() argument
634 smu8_init_acp_limit(struct pp_hwmgr *hwmgr) smu8_init_acp_limit() argument
660 smu8_init_power_gate_state(struct pp_hwmgr *hwmgr) smu8_init_power_gate_state() argument
676 smu8_init_sclk_threshold(struct pp_hwmgr *hwmgr) smu8_init_sclk_threshold() argument
683 smu8_update_sclk_limit(struct pp_hwmgr *hwmgr) smu8_update_sclk_limit() argument
756 smu8_set_deep_sleep_sclk_threshold(struct pp_hwmgr *hwmgr) smu8_set_deep_sleep_sclk_threshold() argument
775 smu8_set_watermark_threshold(struct pp_hwmgr *hwmgr) smu8_set_watermark_threshold() argument
788 smu8_nbdpm_pstate_enable_disable(struct pp_hwmgr *hwmgr, bool enable, bool lock) smu8_nbdpm_pstate_enable_disable() argument
813 smu8_disable_nb_dpm(struct pp_hwmgr *hwmgr) smu8_disable_nb_dpm() argument
835 smu8_enable_nb_dpm(struct pp_hwmgr *hwmgr) smu8_enable_nb_dpm() argument
857 smu8_update_low_mem_pstate(struct pp_hwmgr *hwmgr, const void *input) smu8_update_low_mem_pstate() argument
879 smu8_set_power_state_tasks(struct pp_hwmgr *hwmgr, const void *input) smu8_set_power_state_tasks() argument
895 smu8_setup_asic_task(struct pp_hwmgr *hwmgr) smu8_setup_asic_task() argument
921 smu8_power_up_display_clock_sys_pll(struct pp_hwmgr *hwmgr) smu8_power_up_display_clock_sys_pll() argument
929 smu8_clear_nb_dpm_flag(struct pp_hwmgr *hwmgr) smu8_clear_nb_dpm_flag() argument
936 smu8_reset_cc6_data(struct pp_hwmgr *hwmgr) smu8_reset_cc6_data() argument
946 smu8_program_voting_clients(struct pp_hwmgr *hwmgr) smu8_program_voting_clients() argument
953 smu8_clear_voting_clients(struct pp_hwmgr *hwmgr) smu8_clear_voting_clients() argument
959 smu8_start_dpm(struct pp_hwmgr *hwmgr) smu8_start_dpm() argument
971 smu8_stop_dpm(struct pp_hwmgr *hwmgr) smu8_stop_dpm() argument
988 smu8_program_bootup_state(struct pp_hwmgr *hwmgr) smu8_program_bootup_state() argument
1012 smu8_reset_acp_boot_level(struct pp_hwmgr *hwmgr) smu8_reset_acp_boot_level() argument
1019 smu8_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr) smu8_populate_umdpstate_clocks() argument
1031 smu8_enable_dpm_tasks(struct pp_hwmgr *hwmgr) smu8_enable_dpm_tasks() argument
1044 smu8_disable_dpm_tasks(struct pp_hwmgr *hwmgr) smu8_disable_dpm_tasks() argument
1055 smu8_power_off_asic(struct pp_hwmgr *hwmgr) smu8_power_off_asic() argument
1064 smu8_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, struct pp_power_state *prequest_ps, const struct pp_power_state *pcurrent_ps) smu8_apply_state_adjust_rules() argument
1109 smu8_hwmgr_backend_init(struct pp_hwmgr *hwmgr) smu8_hwmgr_backend_init() argument
1139 smu8_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) smu8_hwmgr_backend_fini() argument
1151 smu8_phm_force_dpm_highest(struct pp_hwmgr *hwmgr) smu8_phm_force_dpm_highest() argument
1172 smu8_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr) smu8_phm_unforce_dpm_levels() argument
1212 smu8_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr) smu8_phm_force_dpm_lowest() argument
1233 smu8_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) smu8_dpm_force_dpm_level() argument
1260 smu8_dpm_powerdown_uvd(struct pp_hwmgr *hwmgr) smu8_dpm_powerdown_uvd() argument
1267 smu8_dpm_powerup_uvd(struct pp_hwmgr *hwmgr) smu8_dpm_powerup_uvd() argument
1280 smu8_dpm_update_vce_dpm(struct pp_hwmgr *hwmgr) smu8_dpm_update_vce_dpm() argument
1314 smu8_dpm_powerdown_vce(struct pp_hwmgr *hwmgr) smu8_dpm_powerdown_vce() argument
1323 smu8_dpm_powerup_vce(struct pp_hwmgr *hwmgr) smu8_dpm_powerup_vce() argument
1332 smu8_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) smu8_dpm_get_mclk() argument
1339 smu8_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) smu8_dpm_get_sclk() argument
1360 smu8_dpm_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) smu8_dpm_patch_boot_state() argument
1374 smu8_dpm_get_pp_table_entry_callback( struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps, unsigned int index, const void *clock_info) smu8_dpm_get_pp_table_entry_callback() argument
1404 smu8_dpm_get_num_of_pp_table_entries(struct pp_hwmgr *hwmgr) smu8_dpm_get_num_of_pp_table_entries() argument
1414 smu8_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr, unsigned long entry, struct pp_power_state *ps) smu8_dpm_get_pp_table_entry() argument
1433 smu8_get_power_state_size(struct pp_hwmgr *hwmgr) smu8_get_power_state_size() argument
1453 smu8_set_cpu_power_state(struct pp_hwmgr *hwmgr) smu8_set_cpu_power_state() argument
1487 smu8_store_cc6_data(struct pp_hwmgr *hwmgr, uint32_t separation_time, bool cc6_disable, bool pstate_disable, bool pstate_switch_disable) smu8_store_cc6_data() argument
1514 smu8_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) smu8_get_dal_power_level() argument
1535 smu8_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) smu8_force_clock_level() argument
1556 smu8_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) smu8_print_clock_levels() argument
1596 smu8_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) smu8_get_performance_level() argument
1635 smu8_get_current_shallow_sleep_clocks(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, struct pp_clock_info *clock_info) smu8_get_current_shallow_sleep_clocks() argument
1646 smu8_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) smu8_get_clock_by_type() argument
1676 smu8_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) smu8_get_max_high_clocks() argument
1699 smu8_thermal_get_temperature(struct pp_hwmgr *hwmgr) smu8_thermal_get_temperature() argument
1714 smu8_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) smu8_read_sensor() argument
1824 smu8_notify_cac_buffer_info(struct pp_hwmgr *hwmgr, uint32_t virtual_addr_low, uint32_t virtual_addr_hi, uint32_t mc_addr_low, uint32_t mc_addr_hi, uint32_t size) smu8_notify_cac_buffer_info() argument
1855 smu8_get_thermal_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *thermal_data) smu8_get_thermal_temperature_range() argument
1869 smu8_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) smu8_enable_disable_uvd_dpm() argument
1894 smu8_dpm_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate) smu8_dpm_update_uvd_dpm() argument
1925 smu8_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) smu8_enable_disable_vce_dpm() argument
1952 smu8_dpm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate) smu8_dpm_powergate_acp() argument
1967 smu8_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) smu8_dpm_powergate_uvd() argument
2002 smu8_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) smu8_dpm_powergate_vce() argument
2064 smu8_init_function_pointers(struct pp_hwmgr *hwmgr) smu8_init_function_pointers() argument
[all...]
H A Dsmu7_clockpowergating.c28 static int smu7_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) in smu7_enable_disable_uvd_dpm() argument
30 return smum_send_msg_to_smc(hwmgr, enable ? in smu7_enable_disable_uvd_dpm()
36 static int smu7_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) in smu7_enable_disable_vce_dpm() argument
38 return smum_send_msg_to_smc(hwmgr, enable ? in smu7_enable_disable_vce_dpm()
44 static int smu7_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate) in smu7_update_uvd_dpm() argument
47 smum_update_smc_table(hwmgr, SMU_UVD_TABLE); in smu7_update_uvd_dpm()
48 return smu7_enable_disable_uvd_dpm(hwmgr, !bgate); in smu7_update_uvd_dpm()
51 static int smu7_update_vce_dpm(struct pp_hwmgr *hwmgr, bool bgate) in smu7_update_vce_dpm() argument
54 smum_update_smc_table(hwmgr, SMU_VCE_TABLE); in smu7_update_vce_dpm()
55 return smu7_enable_disable_vce_dpm(hwmgr, !bgat in smu7_update_vce_dpm()
58 smu7_powerdown_uvd(struct pp_hwmgr *hwmgr) smu7_powerdown_uvd() argument
67 smu7_powerup_uvd(struct pp_hwmgr *hwmgr) smu7_powerup_uvd() argument
83 smu7_powerdown_vce(struct pp_hwmgr *hwmgr) smu7_powerdown_vce() argument
92 smu7_powerup_vce(struct pp_hwmgr *hwmgr) smu7_powerup_vce() argument
101 smu7_disable_clock_power_gating(struct pp_hwmgr *hwmgr) smu7_disable_clock_power_gating() argument
114 smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) smu7_powergate_uvd() argument
142 smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) smu7_powergate_vce() argument
169 smu7_update_clock_gatings(struct pp_hwmgr *hwmgr, const uint32_t *msg_id) smu7_update_clock_gatings() argument
424 smu7_powergate_gfx(struct pp_hwmgr *hwmgr, bool enable) smu7_powergate_gfx() argument
[all...]
H A Dvega12_hwmgr.c28 #include "hwmgr.h"
57 static int vega12_force_clock_level(struct pp_hwmgr *hwmgr,
59 static int vega12_get_clock_ranges(struct pp_hwmgr *hwmgr,
64 static void vega12_set_default_registry_data(struct pp_hwmgr *hwmgr) in vega12_set_default_registry_data() argument
67 (struct vega12_hwmgr *)(hwmgr->backend); in vega12_set_default_registry_data()
135 data->registry_data.pcie_dpm_key_disabled = !(hwmgr->feature_mask & PP_PCIE_DPM_MASK); in vega12_set_default_registry_data()
138 static int vega12_set_features_platform_caps(struct pp_hwmgr *hwmgr) in vega12_set_features_platform_caps() argument
141 (struct vega12_hwmgr *)(hwmgr->backend); in vega12_set_features_platform_caps()
142 struct amdgpu_device *adev = hwmgr->adev; in vega12_set_features_platform_caps()
145 phm_cap_unset(hwmgr in vega12_set_features_platform_caps()
296 vega12_init_dpm_defaults(struct pp_hwmgr *hwmgr) vega12_init_dpm_defaults() argument
373 vega12_set_private_data_based_on_pptable(struct pp_hwmgr *hwmgr) vega12_set_private_data_based_on_pptable() argument
378 vega12_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) vega12_hwmgr_backend_fini() argument
386 vega12_hwmgr_backend_init(struct pp_hwmgr *hwmgr) vega12_hwmgr_backend_init() argument
450 vega12_init_sclk_threshold(struct pp_hwmgr *hwmgr) vega12_init_sclk_threshold() argument
460 vega12_setup_asic_task(struct pp_hwmgr *hwmgr) vega12_setup_asic_task() argument
484 vega12_override_pcie_parameters(struct pp_hwmgr *hwmgr) vega12_override_pcie_parameters() argument
568 vega12_get_number_of_dpm_level(struct pp_hwmgr *hwmgr, PPCLK_e clk_id, uint32_t *num_of_levels) vega12_get_number_of_dpm_level() argument
584 vega12_get_dpm_frequency_by_index(struct pp_hwmgr *hwmgr, PPCLK_e clkID, uint32_t index, uint32_t *clock) vega12_get_dpm_frequency_by_index() argument
600 vega12_setup_single_dpm_table(struct pp_hwmgr *hwmgr, struct vega12_single_dpm_table *dpm_table, PPCLK_e clk_id) vega12_setup_single_dpm_table() argument
633 vega12_setup_default_dpm_tables(struct pp_hwmgr *hwmgr) vega12_setup_default_dpm_tables() argument
810 vega12_init_smc_table(struct pp_hwmgr *hwmgr) vega12_init_smc_table() argument
849 vega12_run_acg_btc(struct pp_hwmgr *hwmgr) vega12_run_acg_btc() argument
864 vega12_set_allowed_featuresmask(struct pp_hwmgr *hwmgr) vega12_set_allowed_featuresmask() argument
892 vega12_init_powergate_state(struct pp_hwmgr *hwmgr) vega12_init_powergate_state() argument
907 vega12_enable_all_smu_features(struct pp_hwmgr *hwmgr) vega12_enable_all_smu_features() argument
933 vega12_disable_all_smu_features(struct pp_hwmgr *hwmgr) vega12_disable_all_smu_features() argument
957 vega12_odn_initialize_default_settings( struct pp_hwmgr *hwmgr) vega12_odn_initialize_default_settings() argument
963 vega12_set_overdrive_target_percentage(struct pp_hwmgr *hwmgr, uint32_t adjust_percent) vega12_set_overdrive_target_percentage() argument
971 vega12_power_control_set_level(struct pp_hwmgr *hwmgr) vega12_power_control_set_level() argument
986 vega12_get_all_clock_ranges_helper(struct pp_hwmgr *hwmgr, PPCLK_e clkid, struct vega12_clock_range *clock) vega12_get_all_clock_ranges_helper() argument
1013 vega12_get_all_clock_ranges(struct pp_hwmgr *hwmgr) vega12_get_all_clock_ranges() argument
1028 vega12_populate_umdpstate_clocks(struct pp_hwmgr *hwmgr) vega12_populate_umdpstate_clocks() argument
1047 vega12_enable_dpm_tasks(struct pp_hwmgr *hwmgr) vega12_enable_dpm_tasks() argument
1104 vega12_patch_boot_state(struct pp_hwmgr *hwmgr, struct pp_hw_power_state *hw_ps) vega12_patch_boot_state() argument
1149 vega12_upload_dpm_min_level(struct pp_hwmgr *hwmgr) vega12_upload_dpm_min_level() argument
1240 vega12_upload_dpm_max_level(struct pp_hwmgr *hwmgr) vega12_upload_dpm_max_level() argument
1312 vega12_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) vega12_enable_disable_vce_dpm() argument
1329 vega12_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) vega12_dpm_get_sclk() argument
1352 vega12_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) vega12_dpm_get_mclk() argument
1375 vega12_get_metrics_table(struct pp_hwmgr *hwmgr, SmuMetrics_t *metrics_table, bool bypass_cache) vega12_get_metrics_table() argument
1403 vega12_get_gpu_power(struct pp_hwmgr *hwmgr, uint32_t *query) vega12_get_gpu_power() argument
1417 vega12_get_current_gfx_clk_freq(struct pp_hwmgr *hwmgr, uint32_t *gfx_freq) vega12_get_current_gfx_clk_freq() argument
1434 vega12_get_current_mclk_freq(struct pp_hwmgr *hwmgr, uint32_t *mclk_freq) vega12_get_current_mclk_freq() argument
1451 vega12_get_current_activity_percent( struct pp_hwmgr *hwmgr, int idx, uint32_t *activity_percent) vega12_get_current_activity_percent() argument
1478 vega12_read_sensor(struct pp_hwmgr *hwmgr, int idx, void *value, int *size) vega12_read_sensor() argument
1549 vega12_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_disp) vega12_notify_smc_display_change() argument
1563 vega12_display_clock_voltage_request(struct pp_hwmgr *hwmgr, struct pp_display_clock_request *clock_req) vega12_display_clock_voltage_request() argument
1605 vega12_notify_smc_display_config_after_ps_adjustment( struct pp_hwmgr *hwmgr) vega12_notify_smc_display_config_after_ps_adjustment() argument
1644 vega12_force_dpm_highest(struct pp_hwmgr *hwmgr) vega12_force_dpm_highest() argument
1674 vega12_force_dpm_lowest(struct pp_hwmgr *hwmgr) vega12_force_dpm_lowest() argument
1704 vega12_unforce_dpm_levels(struct pp_hwmgr *hwmgr) vega12_unforce_dpm_levels() argument
1717 vega12_get_profiling_clk_mask(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level, uint32_t *sclk_mask, uint32_t *mclk_mask, uint32_t *soc_mask) vega12_get_profiling_clk_mask() argument
1750 vega12_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode) vega12_set_fan_control_mode() argument
1768 vega12_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level level) vega12_dpm_force_dpm_level() argument
1805 vega12_get_fan_control_mode(struct pp_hwmgr *hwmgr) vega12_get_fan_control_mode() argument
1815 vega12_get_dal_power_level(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *info) vega12_get_dal_power_level() argument
1830 vega12_get_clock_ranges(struct pp_hwmgr *hwmgr, uint32_t *clock, PPCLK_e clock_select, bool max) vega12_get_clock_ranges() argument
1845 vega12_get_sclks(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) vega12_get_sclks() argument
1872 vega12_get_mem_latency(struct pp_hwmgr *hwmgr, uint32_t clock) vega12_get_mem_latency() argument
1878 vega12_get_memclocks(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) vega12_get_memclocks() argument
1905 vega12_get_dcefclocks(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) vega12_get_dcefclocks() argument
1933 vega12_get_socclocks(struct pp_hwmgr *hwmgr, struct pp_clock_levels_with_latency *clocks) vega12_get_socclocks() argument
1962 vega12_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_latency *clocks) vega12_get_clock_by_type_with_latency() argument
1988 vega12_get_clock_by_type_with_voltage(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct pp_clock_levels_with_voltage *clocks) vega12_get_clock_by_type_with_voltage() argument
1997 vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, void *clock_ranges) vega12_set_watermarks_for_clocks_ranges() argument
2015 vega12_force_clock_level(struct pp_hwmgr *hwmgr, enum pp_clock_type type, uint32_t mask) vega12_force_clock_level() argument
2124 vega12_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf) vega12_get_ppfeature_status() argument
2187 vega12_set_ppfeature_status(struct pp_hwmgr *hwmgr, uint64_t new_ppfeature_masks) vega12_set_ppfeature_status() argument
2224 vega12_get_current_pcie_link_width_level(struct pp_hwmgr *hwmgr) vega12_get_current_pcie_link_width_level() argument
2233 vega12_get_current_pcie_link_width(struct pp_hwmgr *hwmgr) vega12_get_current_pcie_link_width() argument
2244 vega12_get_current_pcie_link_speed_level(struct pp_hwmgr *hwmgr) vega12_get_current_pcie_link_speed_level() argument
2253 vega12_get_current_pcie_link_speed(struct pp_hwmgr *hwmgr) vega12_get_current_pcie_link_speed() argument
2264 vega12_print_clock_levels(struct pp_hwmgr *hwmgr, enum pp_clock_type type, char *buf) vega12_print_clock_levels() argument
2348 vega12_apply_clocks_adjust_rules(struct pp_hwmgr *hwmgr) vega12_apply_clocks_adjust_rules() argument
2508 vega12_set_uclk_to_highest_dpm_level(struct pp_hwmgr *hwmgr, struct vega12_single_dpm_table *dpm_table) vega12_set_uclk_to_highest_dpm_level() argument
2534 vega12_pre_display_configuration_changed_task(struct pp_hwmgr *hwmgr) vega12_pre_display_configuration_changed_task() argument
2549 vega12_display_configuration_changed_task(struct pp_hwmgr *hwmgr) vega12_display_configuration_changed_task() argument
2573 vega12_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable) vega12_enable_disable_uvd_dpm() argument
2590 vega12_power_gate_vce(struct pp_hwmgr *hwmgr, bool bgate) vega12_power_gate_vce() argument
2601 vega12_power_gate_uvd(struct pp_hwmgr *hwmgr, bool bgate) vega12_power_gate_uvd() argument
2613 vega12_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr) vega12_check_smc_update_required_for_display_configuration() argument
2629 vega12_disable_dpm_tasks(struct pp_hwmgr *hwmgr) vega12_disable_dpm_tasks() argument
2640 vega12_power_off_asic(struct pp_hwmgr *hwmgr) vega12_power_off_asic() argument
2731 vega12_notify_cac_buffer_info(struct pp_hwmgr *hwmgr, uint32_t virtual_addr_low, uint32_t virtual_addr_hi, uint32_t mc_addr_low, uint32_t mc_addr_hi, uint32_t size) vega12_notify_cac_buffer_info() argument
2763 vega12_get_thermal_temperature_range(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *thermal_data) vega12_get_thermal_temperature_range() argument
2792 vega12_enable_gfx_off(struct pp_hwmgr *hwmgr) vega12_enable_gfx_off() argument
2804 vega12_disable_gfx_off(struct pp_hwmgr *hwmgr) vega12_disable_gfx_off() argument
2816 vega12_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable) vega12_gfx_off_control() argument
2824 vega12_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state, PHM_PerformanceLevelDesignation designation, uint32_t index, PHM_PerformanceLevel *level) vega12_get_performance_level() argument
2831 vega12_set_mp1_state(struct pp_hwmgr *hwmgr, enum pp_mp1_state mp1_state) vega12_set_mp1_state() argument
2867 vega12_get_gpu_metrics(struct pp_hwmgr *hwmgr, void **table) vega12_get_gpu_metrics() argument
2978 vega12_hwmgr_init(struct pp_hwmgr *hwmgr) vega12_hwmgr_init() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/
H A Damd_powerplay.c34 #include "hwmgr.h"
42 struct pp_hwmgr *hwmgr; in amd_powerplay_create() local
47 hwmgr = kzalloc(sizeof(struct pp_hwmgr), GFP_KERNEL); in amd_powerplay_create()
48 if (hwmgr == NULL) in amd_powerplay_create()
51 hwmgr->adev = adev; in amd_powerplay_create()
52 hwmgr->not_vf = !amdgpu_sriov_vf(adev); in amd_powerplay_create()
53 hwmgr->device = amdgpu_cgs_create_device(adev); in amd_powerplay_create()
54 mutex_init(&hwmgr->msg_lock); in amd_powerplay_create()
55 hwmgr->chip_family = adev->family; in amd_powerplay_create()
56 hwmgr in amd_powerplay_create()
67 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; amd_powerplay_destroy() local
97 struct pp_hwmgr *hwmgr = pp_swctf_delayed_work_handler() local
137 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_sw_init() local
154 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_sw_fini() local
167 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_hw_init() local
180 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_hw_fini() local
194 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_reserve_vram_for_smu() local
223 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_late_init() local
268 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_suspend() local
278 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; pp_resume() local
323 struct pp_hwmgr *hwmgr = handle; pp_dpm_load_fw() local
343 struct pp_hwmgr *hwmgr = handle; pp_set_clockgating_by_smu() local
356 pp_dpm_en_umd_pstate(struct pp_hwmgr *hwmgr, enum amd_dpm_forced_level *level) pp_dpm_en_umd_pstate() argument
383 struct pp_hwmgr *hwmgr = handle; pp_dpm_force_performance_level() local
401 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_performance_level() local
411 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_sclk() local
425 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_mclk() local
439 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_vce() local
453 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_uvd() local
468 struct pp_hwmgr *hwmgr = handle; pp_dpm_dispatch_tasks() local
478 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_current_power_state() local
510 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_fan_control_mode() local
528 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_fan_control_mode() local
545 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_fan_speed_pwm() local
561 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_fan_speed_pwm() local
577 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_fan_speed_rpm() local
593 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_fan_speed_rpm() local
610 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_pp_num_states() local
645 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_pp_table() local
656 struct pp_hwmgr *hwmgr = handle; amd_powerplay_reset() local
672 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_pp_table() local
703 struct pp_hwmgr *hwmgr = handle; pp_dpm_force_clock_level() local
726 struct pp_hwmgr *hwmgr = handle; pp_dpm_emit_clock_levels() local
740 struct pp_hwmgr *hwmgr = handle; pp_dpm_print_clock_levels() local
754 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_sclk_od() local
768 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_sclk_od() local
783 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_mclk_od() local
797 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_mclk_od() local
812 struct pp_hwmgr *hwmgr = handle; pp_dpm_read_sensor() local
844 struct pp_hwmgr *hwmgr = handle; pp_dpm_get_vce_clock_state() local
856 struct pp_hwmgr *hwmgr = handle; pp_get_power_profile_mode() local
868 struct pp_hwmgr *hwmgr = handle; pp_set_power_profile_mode() local
883 struct pp_hwmgr *hwmgr = handle; pp_set_fine_grain_clk_vol() local
897 struct pp_hwmgr *hwmgr = handle; pp_odn_edit_dpm_table() local
912 struct pp_hwmgr *hwmgr = handle; pp_dpm_set_mp1_state() local
929 struct pp_hwmgr *hwmgr = handle; pp_dpm_switch_power_profile() local
970 struct pp_hwmgr *hwmgr = handle; pp_set_power_limit() local
1002 struct pp_hwmgr *hwmgr = handle; pp_get_power_limit() local
1036 struct pp_hwmgr *hwmgr = handle; pp_display_configuration_change() local
1048 struct pp_hwmgr *hwmgr = handle; pp_get_display_power_level() local
1061 struct pp_hwmgr *hwmgr = handle; pp_get_current_clocks() local
1106 struct pp_hwmgr *hwmgr = handle; pp_get_clock_by_type() local
1121 struct pp_hwmgr *hwmgr = handle; pp_get_clock_by_type_with_latency() local
1133 struct pp_hwmgr *hwmgr = handle; pp_get_clock_by_type_with_voltage() local
1144 struct pp_hwmgr *hwmgr = handle; pp_set_watermarks_for_clocks_ranges() local
1156 struct pp_hwmgr *hwmgr = handle; pp_display_clock_voltage_request() local
1167 struct pp_hwmgr *hwmgr = handle; pp_get_display_mode_validation_clocks() local
1183 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_mmhub() local
1198 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_gfx() local
1213 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_acp() local
1228 struct pp_hwmgr *hwmgr = handle; pp_dpm_powergate_sdma() local
1279 struct pp_hwmgr *hwmgr = handle; pp_notify_smu_enable_pwe() local
1296 struct pp_hwmgr *hwmgr = handle; pp_enable_mgpu_fan_boost() local
1312 struct pp_hwmgr *hwmgr = handle; pp_set_min_deep_sleep_dcefclk() local
1329 struct pp_hwmgr *hwmgr = handle; pp_set_hard_min_dcefclk_by_freq() local
1346 struct pp_hwmgr *hwmgr = handle; pp_set_hard_min_fclk_by_freq() local
1363 struct pp_hwmgr *hwmgr = handle; pp_set_active_display_count() local
1373 struct pp_hwmgr *hwmgr = handle; pp_get_asic_baco_capability() local
1390 struct pp_hwmgr *hwmgr = handle; pp_get_asic_baco_state() local
1405 struct pp_hwmgr *hwmgr = handle; pp_set_asic_baco_state() local
1421 struct pp_hwmgr *hwmgr = handle; pp_get_ppfeature_status() local
1436 struct pp_hwmgr *hwmgr = handle; pp_set_ppfeature_status() local
1451 struct pp_hwmgr *hwmgr = handle; pp_asic_reset_mode_2() local
1466 struct pp_hwmgr *hwmgr = handle; pp_smu_i2c_bus_access() local
1481 struct pp_hwmgr *hwmgr = handle; pp_set_df_cstate() local
1496 struct pp_hwmgr *hwmgr = handle; pp_set_xgmi_pstate() local
1511 struct pp_hwmgr *hwmgr = handle; pp_get_gpu_metrics() local
1524 struct pp_hwmgr *hwmgr = handle; pp_gfx_state_change_set() local
1540 struct pp_hwmgr *hwmgr = handle; pp_get_prv_buffer_details() local
1561 struct pp_hwmgr *hwmgr = handle; pp_pm_compute_clocks() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmumgr.c57 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr) in smum_thermal_avfs_enable() argument
59 if (NULL != hwmgr->smumgr_funcs->thermal_avfs_enable) in smum_thermal_avfs_enable()
60 return hwmgr->smumgr_funcs->thermal_avfs_enable(hwmgr); in smum_thermal_avfs_enable()
65 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) in smum_thermal_setup_fan_table() argument
67 if (NULL != hwmgr->smumgr_funcs->thermal_setup_fan_table) in smum_thermal_setup_fan_table()
68 return hwmgr->smumgr_funcs->thermal_setup_fan_table(hwmgr); in smum_thermal_setup_fan_table()
73 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr) in smum_update_sclk_threshold() argument
76 if (NULL != hwmgr in smum_update_sclk_threshold()
82 smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type) smum_update_smc_table() argument
91 smum_get_offsetof(struct pp_hwmgr *hwmgr, uint32_t type, uint32_t member) smum_get_offsetof() argument
99 smum_process_firmware_header(struct pp_hwmgr *hwmgr) smum_process_firmware_header() argument
106 smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value) smum_get_mac_definition() argument
114 smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table) smum_download_powerplay_table() argument
122 smum_upload_powerplay_table(struct pp_hwmgr *hwmgr) smum_upload_powerplay_table() argument
130 smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp) smum_send_msg_to_smc() argument
155 smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t parameter, uint32_t *resp) smum_send_msg_to_smc_with_parameter() argument
184 smum_init_smc_table(struct pp_hwmgr *hwmgr) smum_init_smc_table() argument
192 smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) smum_populate_all_graphic_levels() argument
200 smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr) smum_populate_all_memory_levels() argument
209 smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) smum_initialize_mc_reg_table() argument
217 smum_is_dpm_running(struct pp_hwmgr *hwmgr) smum_is_dpm_running() argument
225 smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr) smum_is_hw_avfs_present() argument
233 smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting) smum_update_dpm_settings() argument
241 smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw) smum_smc_table_manager() argument
249 smum_stop_smc(struct pp_hwmgr *hwmgr) smum_stop_smc() argument
[all...]
H A Dsmu7_smumgr.c38 static int smu7_set_smc_sram_address(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t limit) in smu7_set_smc_sram_address() argument
43 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, smc_addr); in smu7_set_smc_sram_address()
44 PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0); /* on ci, SMC_IND_ACCESS_CNTL is different */ in smu7_set_smc_sram_address()
49 int smu7_copy_bytes_from_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address, uint32_t *dest, uint32_t byte_count, uint32_t limit) in smu7_copy_bytes_from_smc() argument
63 smu7_read_smc_sram_dword(hwmgr, addr, &data, limit); in smu7_copy_bytes_from_smc()
73 smu7_read_smc_sram_dword(hwmgr, addr, &data, limit); in smu7_copy_bytes_from_smc()
85 int smu7_copy_bytes_to_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address, in smu7_copy_bytes_to_smc() argument
103 result = smu7_set_smc_sram_address(hwmgr, addr, limit); in smu7_copy_bytes_to_smc()
108 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data); in smu7_copy_bytes_to_smc()
119 result = smu7_set_smc_sram_address(hwmgr, add in smu7_copy_bytes_to_smc()
151 smu7_program_jump_on_start(struct pp_hwmgr *hwmgr) smu7_program_jump_on_start() argument
160 smu7_is_smc_ram_running(struct pp_hwmgr *hwmgr) smu7_is_smc_ram_running() argument
166 smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) smu7_send_msg_to_smc() argument
194 smu7_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t parameter) smu7_send_msg_to_smc_with_parameter() argument
203 smu7_get_argument(struct pp_hwmgr *hwmgr) smu7_get_argument() argument
208 smu7_send_msg_to_smc_offset(struct pp_hwmgr *hwmgr) smu7_send_msg_to_smc_offset() argument
262 smu7_read_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t *value, uint32_t limit) smu7_read_smc_sram_dword() argument
273 smu7_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t value, uint32_t limit) smu7_write_smc_sram_dword() argument
287 smu7_populate_single_firmware_entry(struct pp_hwmgr *hwmgr, uint32_t fw_type, struct SMU_Entry *entry) smu7_populate_single_firmware_entry() argument
322 smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr) smu7_request_smu_load_fw() argument
434 smu7_check_fw_load_finish(struct pp_hwmgr *hwmgr, uint32_t fw_type) smu7_check_fw_load_finish() argument
446 smu7_reload_firmware(struct pp_hwmgr *hwmgr) smu7_reload_firmware() argument
451 smu7_upload_smc_firmware_data(struct pp_hwmgr *hwmgr, uint32_t length, uint32_t *src, uint32_t limit) smu7_upload_smc_firmware_data() argument
471 smu7_upload_smu_firmware_image(struct pp_hwmgr *hwmgr) smu7_upload_smu_firmware_image() argument
492 execute_pwr_table(struct pp_hwmgr *hwmgr, const PWR_Command_Table *pvirus, int size) execute_pwr_table() argument
508 execute_pwr_dfy_table(struct pp_hwmgr *hwmgr, const PWR_DFY_Section *section) execute_pwr_dfy_table() argument
519 smu7_setup_pwr_virus(struct pp_hwmgr *hwmgr) smu7_setup_pwr_virus() argument
533 smu7_init(struct pp_hwmgr *hwmgr) smu7_init() argument
582 smu7_smu_fini(struct pp_hwmgr *hwmgr) smu7_smu_fini() argument
[all...]
H A Dsmu8_smumgr.c56 static uint32_t smu8_get_argument(struct pp_hwmgr *hwmgr) in smu8_get_argument() argument
58 if (hwmgr == NULL || hwmgr->device == NULL) in smu8_get_argument()
61 return cgs_read_register(hwmgr->device, in smu8_get_argument()
66 static int smu8_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, in smu8_send_msg_to_smc_with_parameter() argument
73 if (hwmgr == NULL || hwmgr->device == NULL) in smu8_send_msg_to_smc_with_parameter()
76 result = PHM_WAIT_FIELD_UNEQUAL(hwmgr, in smu8_send_msg_to_smc_with_parameter()
80 uint32_t val = cgs_read_register(hwmgr->device, in smu8_send_msg_to_smc_with_parameter()
88 cgs_write_register(hwmgr in smu8_send_msg_to_smc_with_parameter()
104 smu8_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) smu8_send_msg_to_smc() argument
109 smu8_set_smc_sram_address(struct pp_hwmgr *hwmgr, uint32_t smc_address, uint32_t limit) smu8_set_smc_sram_address() argument
131 smu8_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_address, uint32_t value, uint32_t limit) smu8_write_smc_sram_dword() argument
146 smu8_check_fw_load_finish(struct pp_hwmgr *hwmgr, uint32_t firmware) smu8_check_fw_load_finish() argument
174 smu8_load_mec_firmware(struct pp_hwmgr *hwmgr) smu8_load_mec_firmware() argument
217 smu8_translate_firmware_enum_to_arg(struct pp_hwmgr *hwmgr, enum smu8_scratch_entry firmware_enum) smu8_translate_firmware_enum_to_arg() argument
326 smu8_smu_populate_single_scratch_task( struct pp_hwmgr *hwmgr, enum smu8_scratch_entry fw_enum, uint8_t type, bool is_last) smu8_smu_populate_single_scratch_task() argument
363 smu8_smu_populate_single_ucode_load_task( struct pp_hwmgr *hwmgr, enum smu8_scratch_entry fw_enum, bool is_last) smu8_smu_populate_single_ucode_load_task() argument
393 smu8_smu_construct_toc_for_rlc_aram_save(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_rlc_aram_save() argument
405 smu8_smu_initialize_toc_empty_job_list(struct pp_hwmgr *hwmgr) smu8_smu_initialize_toc_empty_job_list() argument
417 smu8_smu_construct_toc_for_vddgfx_enter(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_vddgfx_enter() argument
435 smu8_smu_construct_toc_for_vddgfx_exit(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_vddgfx_exit() argument
477 smu8_smu_construct_toc_for_power_profiling(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_power_profiling() argument
489 smu8_smu_construct_toc_for_bootup(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_bootup() argument
517 smu8_smu_construct_toc_for_clock_table(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_clock_table() argument
530 smu8_smu_construct_toc(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc() argument
546 smu8_smu_populate_firmware_entries(struct pp_hwmgr *hwmgr) smu8_smu_populate_firmware_entries() argument
580 smu8_smu_populate_single_scratch_entry( struct pp_hwmgr *hwmgr, enum smu8_scratch_entry scratch_type, uint32_t ulsize_byte, struct smu8_buffer_entry *entry) smu8_smu_populate_single_scratch_entry() argument
600 smu8_download_pptable_settings(struct pp_hwmgr *hwmgr, void **table) smu8_download_pptable_settings() argument
632 smu8_upload_pptable_settings(struct pp_hwmgr *hwmgr) smu8_upload_pptable_settings() argument
662 smu8_request_smu_load_fw(struct pp_hwmgr *hwmgr) smu8_request_smu_load_fw() argument
732 smu8_start_smu(struct pp_hwmgr *hwmgr) smu8_start_smu() argument
756 smu8_smu_init(struct pp_hwmgr *hwmgr) smu8_smu_init() argument
849 smu8_smu_fini(struct pp_hwmgr *hwmgr) smu8_smu_fini() argument
870 smu8_dpm_check_smu_features(struct pp_hwmgr *hwmgr, unsigned long check_feature) smu8_dpm_check_smu_features() argument
888 smu8_is_dpm_running(struct pp_hwmgr *hwmgr) smu8_is_dpm_running() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dsmumgr.c57 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr) in smum_thermal_avfs_enable() argument
59 if (NULL != hwmgr->smumgr_funcs->thermal_avfs_enable) in smum_thermal_avfs_enable()
60 return hwmgr->smumgr_funcs->thermal_avfs_enable(hwmgr); in smum_thermal_avfs_enable()
65 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) in smum_thermal_setup_fan_table() argument
67 if (NULL != hwmgr->smumgr_funcs->thermal_setup_fan_table) in smum_thermal_setup_fan_table()
68 return hwmgr->smumgr_funcs->thermal_setup_fan_table(hwmgr); in smum_thermal_setup_fan_table()
73 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr) in smum_update_sclk_threshold() argument
76 if (NULL != hwmgr in smum_update_sclk_threshold()
82 smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type) smum_update_smc_table() argument
91 smum_get_offsetof(struct pp_hwmgr *hwmgr, uint32_t type, uint32_t member) smum_get_offsetof() argument
99 smum_process_firmware_header(struct pp_hwmgr *hwmgr) smum_process_firmware_header() argument
106 smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value) smum_get_mac_definition() argument
114 smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table) smum_download_powerplay_table() argument
122 smum_upload_powerplay_table(struct pp_hwmgr *hwmgr) smum_upload_powerplay_table() argument
130 smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp) smum_send_msg_to_smc() argument
155 smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t parameter, uint32_t *resp) smum_send_msg_to_smc_with_parameter() argument
184 smum_init_smc_table(struct pp_hwmgr *hwmgr) smum_init_smc_table() argument
192 smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) smum_populate_all_graphic_levels() argument
200 smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr) smum_populate_all_memory_levels() argument
209 smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr) smum_initialize_mc_reg_table() argument
217 smum_is_dpm_running(struct pp_hwmgr *hwmgr) smum_is_dpm_running() argument
225 smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr) smum_is_hw_avfs_present() argument
233 smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting) smum_update_dpm_settings() argument
241 smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw) smum_smc_table_manager() argument
249 smum_stop_smc(struct pp_hwmgr *hwmgr) smum_stop_smc() argument
[all...]
H A Dsmu8_smumgr.c56 static uint32_t smu8_get_argument(struct pp_hwmgr *hwmgr) in smu8_get_argument() argument
58 if (hwmgr == NULL || hwmgr->device == NULL) in smu8_get_argument()
61 return cgs_read_register(hwmgr->device, in smu8_get_argument()
66 static int smu8_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, in smu8_send_msg_to_smc_with_parameter() argument
73 if (hwmgr == NULL || hwmgr->device == NULL) in smu8_send_msg_to_smc_with_parameter()
76 result = PHM_WAIT_FIELD_UNEQUAL(hwmgr, in smu8_send_msg_to_smc_with_parameter()
80 uint32_t val = cgs_read_register(hwmgr->device, in smu8_send_msg_to_smc_with_parameter()
88 cgs_write_register(hwmgr in smu8_send_msg_to_smc_with_parameter()
104 smu8_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg) smu8_send_msg_to_smc() argument
109 smu8_set_smc_sram_address(struct pp_hwmgr *hwmgr, uint32_t smc_address, uint32_t limit) smu8_set_smc_sram_address() argument
131 smu8_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_address, uint32_t value, uint32_t limit) smu8_write_smc_sram_dword() argument
146 smu8_check_fw_load_finish(struct pp_hwmgr *hwmgr, uint32_t firmware) smu8_check_fw_load_finish() argument
174 smu8_load_mec_firmware(struct pp_hwmgr *hwmgr) smu8_load_mec_firmware() argument
217 smu8_translate_firmware_enum_to_arg(struct pp_hwmgr *hwmgr, enum smu8_scratch_entry firmware_enum) smu8_translate_firmware_enum_to_arg() argument
326 smu8_smu_populate_single_scratch_task( struct pp_hwmgr *hwmgr, enum smu8_scratch_entry fw_enum, uint8_t type, bool is_last) smu8_smu_populate_single_scratch_task() argument
363 smu8_smu_populate_single_ucode_load_task( struct pp_hwmgr *hwmgr, enum smu8_scratch_entry fw_enum, bool is_last) smu8_smu_populate_single_ucode_load_task() argument
393 smu8_smu_construct_toc_for_rlc_aram_save(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_rlc_aram_save() argument
405 smu8_smu_initialize_toc_empty_job_list(struct pp_hwmgr *hwmgr) smu8_smu_initialize_toc_empty_job_list() argument
417 smu8_smu_construct_toc_for_vddgfx_enter(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_vddgfx_enter() argument
435 smu8_smu_construct_toc_for_vddgfx_exit(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_vddgfx_exit() argument
477 smu8_smu_construct_toc_for_power_profiling(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_power_profiling() argument
489 smu8_smu_construct_toc_for_bootup(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_bootup() argument
517 smu8_smu_construct_toc_for_clock_table(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc_for_clock_table() argument
530 smu8_smu_construct_toc(struct pp_hwmgr *hwmgr) smu8_smu_construct_toc() argument
546 smu8_smu_populate_firmware_entries(struct pp_hwmgr *hwmgr) smu8_smu_populate_firmware_entries() argument
580 smu8_smu_populate_single_scratch_entry( struct pp_hwmgr *hwmgr, enum smu8_scratch_entry scratch_type, uint32_t ulsize_byte, struct smu8_buffer_entry *entry) smu8_smu_populate_single_scratch_entry() argument
600 smu8_download_pptable_settings(struct pp_hwmgr *hwmgr, void **table) smu8_download_pptable_settings() argument
632 smu8_upload_pptable_settings(struct pp_hwmgr *hwmgr) smu8_upload_pptable_settings() argument
662 smu8_request_smu_load_fw(struct pp_hwmgr *hwmgr) smu8_request_smu_load_fw() argument
732 smu8_start_smu(struct pp_hwmgr *hwmgr) smu8_start_smu() argument
756 smu8_smu_init(struct pp_hwmgr *hwmgr) smu8_smu_init() argument
849 smu8_smu_fini(struct pp_hwmgr *hwmgr) smu8_smu_fini() argument
870 smu8_dpm_check_smu_features(struct pp_hwmgr *hwmgr, unsigned long check_feature) smu8_dpm_check_smu_features() argument
888 smu8_is_dpm_running(struct pp_hwmgr *hwmgr) smu8_is_dpm_running() argument
[all...]

Completed in 22 milliseconds

12345678