Home
last modified time | relevance | path

Searched refs:hw_dsc (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dsc_1_2.c59 static int _dsc_calc_output_buf_max_addr(struct dpu_hw_dsc *hw_dsc, int num_softslice) in _dsc_calc_output_buf_max_addr() argument
63 if (hw_dsc->caps->features & BIT(DPU_DSC_NATIVE_42x_EN)) in _dsc_calc_output_buf_max_addr()
69 static void dpu_hw_dsc_disable_1_2(struct dpu_hw_dsc *hw_dsc) in dpu_hw_dsc_disable_1_2() argument
74 if (!hw_dsc) in dpu_hw_dsc_disable_1_2()
77 hw = &hw_dsc->hw; in dpu_hw_dsc_disable_1_2()
78 sblk = hw_dsc->caps->sblk; in dpu_hw_dsc_disable_1_2()
85 static void dpu_hw_dsc_config_1_2(struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_config_1_2() argument
97 if (!hw_dsc || !dsc) in dpu_hw_dsc_config_1_2()
100 hw = &hw_dsc->hw; in dpu_hw_dsc_config_1_2()
102 sblk = hw_dsc in dpu_hw_dsc_config_1_2()
239 dpu_hw_dsc_config_thresh_1_2(struct dpu_hw_dsc *hw_dsc, struct drm_dsc_config *dsc) dpu_hw_dsc_config_thresh_1_2() argument
344 dpu_hw_dsc_bind_pingpong_blk_1_2(struct dpu_hw_dsc *hw_dsc, const enum dpu_pingpong pp) dpu_hw_dsc_bind_pingpong_blk_1_2() argument
[all...]
H A Ddpu_hw_dsc.c43 static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_config() argument
48 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config()
125 static void dpu_hw_dsc_config_thresh(struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_config_thresh() argument
129 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_config_thresh()
159 struct dpu_hw_dsc *hw_dsc, in dpu_hw_dsc_bind_pingpong_blk()
162 struct dpu_hw_blk_reg_map *c = &hw_dsc->hw; in dpu_hw_dsc_bind_pingpong_blk()
166 dsc_ctl_offset = DSC_CTL(hw_dsc->idx); in dpu_hw_dsc_bind_pingpong_blk()
173 hw_dsc->idx - DSC_0, pp - PINGPONG_0); in dpu_hw_dsc_bind_pingpong_blk()
176 hw_dsc->idx - DSC_0); in dpu_hw_dsc_bind_pingpong_blk()
158 dpu_hw_dsc_bind_pingpong_blk( struct dpu_hw_dsc *hw_dsc, const enum dpu_pingpong pp) dpu_hw_dsc_bind_pingpong_blk() argument
H A Ddpu_hw_dsc.h25 * @hw_dsc: Pointer to dsc context
27 void (*dsc_disable)(struct dpu_hw_dsc *hw_dsc);
31 * @hw_dsc: Pointer to dsc context
36 void (*dsc_config)(struct dpu_hw_dsc *hw_dsc,
43 * @hw_dsc: Pointer to dsc context
46 void (*dsc_config_thresh)(struct dpu_hw_dsc *hw_dsc,
49 void (*dsc_bind_pingpong_blk)(struct dpu_hw_dsc *hw_dsc,
H A Ddpu_encoder.c134 * @hw_dsc: Handle to the DSC blocks used for the display.
181 struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC]; member
1057 struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC]; in dpu_encoder_virt_atomic_mode_set() local
1099 hw_dsc, ARRAY_SIZE(hw_dsc)); in dpu_encoder_virt_atomic_mode_set()
1101 dpu_enc->hw_dsc[i] = to_dpu_hw_dsc(hw_dsc[i]); in dpu_encoder_virt_atomic_mode_set()
1102 dsc_mask |= BIT(dpu_enc->hw_dsc[i]->idx - DSC_0); in dpu_encoder_virt_atomic_mode_set()
1805 struct dpu_hw_dsc *hw_dsc, in dpu_encoder_dsc_pipe_cfg()
1811 if (hw_dsc in dpu_encoder_dsc_pipe_cfg()
1804 dpu_encoder_dsc_pipe_cfg(struct dpu_hw_ctl *ctl, struct dpu_hw_dsc *hw_dsc, struct dpu_hw_pingpong *hw_pp, struct drm_dsc_config *dsc, u32 common_mode, u32 initial_lines) dpu_encoder_dsc_pipe_cfg() argument
1836 struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC]; dpu_encoder_prep_dsc() local
1999 dpu_encoder_dsc_pipe_clr(struct dpu_hw_ctl *ctl, struct dpu_hw_dsc *hw_dsc, struct dpu_hw_pingpong *hw_pp) dpu_encoder_dsc_pipe_clr() argument
2021 struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC]; dpu_encoder_unprep_dsc() local
[all...]

Completed in 5 milliseconds