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Searched refs:h264_dec (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/drivers/media/platform/verisilicon/
H A Dhantro_h264.c204 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in assemble_scaling_list()
210 struct hantro_h264_dec_priv_tbl *tbl = ctx->h264_dec.priv.cpu; in assemble_scaling_list()
234 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in prepare_table()
237 struct hantro_h264_dec_priv_tbl *tbl = ctx->h264_dec.priv.cpu; in prepare_table()
238 const struct v4l2_h264_dpb_entry *dpb = ctx->h264_dec.dpb; in prepare_table()
275 ctx->h264_dec.dpb_valid = dpb_valid; in prepare_table()
276 ctx->h264_dec.dpb_longterm = dpb_longterm; in prepare_table()
280 tbl->poc[32] = ctx->h264_dec.cur_poc; in prepare_table()
303 dec_param = ctx->h264_dec.ctrls.decode; in update_dpb()
306 for (i = 0; i < ARRAY_SIZE(ctx->h264_dec in update_dpb()
498 struct hantro_h264_dec_hw_ctx *h264_dec = &ctx->h264_dec; hantro_h264_dec_exit() local
507 struct hantro_h264_dec_hw_ctx *h264_dec = &ctx->h264_dec; hantro_h264_dec_init() local
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H A Dhantro_g1_h264_dec.c24 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in set_params()
135 vdpu_write_relaxed(vpu, ctx->h264_dec.dpb_valid, G1_REG_VALID_REF); in set_ref()
136 vdpu_write_relaxed(vpu, ctx->h264_dec.dpb_longterm, G1_REG_LT_REF); in set_ref()
150 b0_reflist = ctx->h264_dec.reflists.b0; in set_ref()
151 b1_reflist = ctx->h264_dec.reflists.b1; in set_ref()
152 p_reflist = ctx->h264_dec.reflists.p; in set_ref()
207 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in set_buffers()
247 vdpu_write_relaxed(vpu, ctx->h264_dec.priv.dma, G1_REG_ADDR_QTABLE); in set_buffers()
H A Drockchip_vpu2_hw_h264_dec.c195 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in set_params()
306 b0_reflist = ctx->h264_dec.reflists.b0; in set_ref()
307 b1_reflist = ctx->h264_dec.reflists.b1; in set_ref()
308 p_reflist = ctx->h264_dec.reflists.p; in set_ref()
408 reg = VDPU_REG_REFER_LTERM_E(ctx->h264_dec.dpb_longterm); in set_ref()
411 reg = VDPU_REG_REFER_VALID_E(ctx->h264_dec.dpb_valid); in set_ref()
424 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in set_buffers()
464 vdpu_write_relaxed(vpu, ctx->h264_dec.priv.dma, VDPU_REG_QTABLE_BASE); in set_buffers()
H A Dhantro.h239 * @h264_dec: H.264-decoding context.
270 struct hantro_h264_dec_hw_ctx h264_dec; member
/kernel/linux/linux-5.10/drivers/staging/media/hantro/
H A Dhantro_h264.c198 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in assemble_scaling_list()
204 struct hantro_h264_dec_priv_tbl *tbl = ctx->h264_dec.priv.cpu; in assemble_scaling_list()
228 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in prepare_table()
230 struct hantro_h264_dec_priv_tbl *tbl = ctx->h264_dec.priv.cpu; in prepare_table()
231 const struct v4l2_h264_dpb_entry *dpb = ctx->h264_dec.dpb; in prepare_table()
259 dec_param = ctx->h264_dec.ctrls.decode; in update_dpb()
262 for (i = 0; i < ARRAY_SIZE(ctx->h264_dec.dpb); i++) in update_dpb()
263 ctx->h264_dec.dpb[i].flags &= ~V4L2_H264_DPB_ENTRY_FLAG_ACTIVE; in update_dpb()
276 for_each_clear_bit(j, used, ARRAY_SIZE(ctx->h264_dec.dpb)) { in update_dpb()
279 cdpb = &ctx->h264_dec in update_dpb()
384 struct hantro_h264_dec_hw_ctx *h264_dec = &ctx->h264_dec; hantro_h264_dec_exit() local
393 struct hantro_h264_dec_hw_ctx *h264_dec = &ctx->h264_dec; hantro_h264_dec_init() local
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H A Dhantro_g1_h264_dec.c24 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in set_params()
130 struct v4l2_h264_dpb_entry *dpb = ctx->h264_dec.dpb; in set_ref()
174 b0_reflist = ctx->h264_dec.reflists.b0; in set_ref()
175 b1_reflist = ctx->h264_dec.reflists.b1; in set_ref()
176 p_reflist = ctx->h264_dec.reflists.p; in set_ref()
231 const struct hantro_h264_dec_ctrls *ctrls = &ctx->h264_dec.ctrls; in set_buffers()
273 vdpu_write_relaxed(vpu, ctx->h264_dec.priv.dma, G1_REG_ADDR_QTABLE); in set_buffers()
H A Dhantro.h242 struct hantro_h264_dec_hw_ctx h264_dec; member

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