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Searched refs:gmu (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/msm/adreno/
H A Da6xx_gmu.c19 static void a6xx_gmu_fault(struct a6xx_gmu *gmu) in a6xx_gmu_fault() argument
21 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_gmu_fault()
26 gmu->hung = true; in a6xx_gmu_fault()
37 struct a6xx_gmu *gmu = data; in a6xx_gmu_irq() local
40 status = gmu_read(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_STATUS); in a6xx_gmu_irq()
41 gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, status); in a6xx_gmu_irq()
44 dev_err_ratelimited(gmu->dev, "GMU watchdog expired\n"); in a6xx_gmu_irq()
46 a6xx_gmu_fault(gmu); in a6xx_gmu_irq()
50 dev_err_ratelimited(gmu in a6xx_gmu_irq()
61 struct a6xx_gmu *gmu = data; a6xx_hfi_irq() local
76 a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu) a6xx_gmu_sptprac_is_on() argument
92 a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu) a6xx_gmu_gx_is_on() argument
112 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_set_freq() local
172 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_get_freq() local
177 a6xx_gmu_check_idle_level(struct a6xx_gmu *gmu) a6xx_gmu_check_idle_level() argument
198 a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu) a6xx_gmu_wait_for_idle() argument
203 a6xx_gmu_start(struct a6xx_gmu *gmu) a6xx_gmu_start() argument
236 a6xx_gmu_hfi_start(struct a6xx_gmu *gmu) a6xx_gmu_hfi_start() argument
296 a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) a6xx_gmu_set_oob() argument
341 a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) a6xx_gmu_clear_oob() argument
359 a6xx_sptprac_enable(struct a6xx_gmu *gmu) a6xx_sptprac_enable() argument
381 a6xx_sptprac_disable(struct a6xx_gmu *gmu) a6xx_sptprac_disable() argument
403 a6xx_gmu_gfx_rail_on(struct a6xx_gmu *gmu) a6xx_gmu_gfx_rail_on() argument
421 a6xx_gmu_notify_slumber(struct a6xx_gmu *gmu) a6xx_gmu_notify_slumber() argument
458 a6xx_rpmh_start(struct a6xx_gmu *gmu) a6xx_rpmh_start() argument
487 a6xx_rpmh_stop(struct a6xx_gmu *gmu) a6xx_rpmh_stop() argument
510 a6xx_gmu_rpmh_init(struct a6xx_gmu *gmu) a6xx_gmu_rpmh_init() argument
638 a6xx_gmu_power_config(struct a6xx_gmu *gmu) a6xx_gmu_power_config() argument
690 a6xx_gmu_fw_load(struct a6xx_gmu *gmu) a6xx_gmu_fw_load() argument
746 a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state) a6xx_gmu_fw_start() argument
849 a6xx_gmu_irq_disable(struct a6xx_gmu *gmu) a6xx_gmu_irq_disable() argument
858 a6xx_gmu_rpmh_off(struct a6xx_gmu *gmu) a6xx_gmu_rpmh_off() argument
874 a6xx_gmu_force_off(struct a6xx_gmu *gmu) a6xx_gmu_force_off() argument
914 a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu) a6xx_gmu_set_initial_freq() argument
928 a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu) a6xx_gmu_set_initial_bw() argument
945 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_resume() local
1024 a6xx_gmu_isidle(struct a6xx_gmu *gmu) a6xx_gmu_isidle() argument
1040 a6xx_gmu_shutdown(struct a6xx_gmu *gmu) a6xx_gmu_shutdown() argument
1102 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_stop() local
1135 a6xx_gmu_memory_free(struct a6xx_gmu *gmu) a6xx_gmu_memory_free() argument
1148 a6xx_gmu_memory_alloc(struct a6xx_gmu *gmu, struct a6xx_gmu_bo *bo, size_t size, u64 iova, const char *name) a6xx_gmu_memory_alloc() argument
1189 a6xx_gmu_memory_probe(struct a6xx_gmu *gmu) a6xx_gmu_memory_probe() argument
1305 a6xx_gmu_rpmh_votes_init(struct a6xx_gmu *gmu) a6xx_gmu_rpmh_votes_init() argument
1355 a6xx_gmu_pwrlevels_probe(struct a6xx_gmu *gmu) a6xx_gmu_pwrlevels_probe() argument
1389 a6xx_gmu_clocks_probe(struct a6xx_gmu *gmu) a6xx_gmu_clocks_probe() argument
1428 a6xx_gmu_get_irq(struct a6xx_gmu *gmu, struct platform_device *pdev, const char *name, irq_handler_t handler) a6xx_gmu_get_irq() argument
1450 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_remove() local
1496 struct a6xx_gmu *gmu = container_of(nb, struct a6xx_gmu, pd_nb); cxpd_notifier_cb() local
1507 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_wrapper_init() local
1570 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_init() local
[all...]
H A Da6xx_gmu.h101 static inline u32 gmu_read(struct a6xx_gmu *gmu, u32 offset) in gmu_read() argument
103 return msm_readl(gmu->mmio + (offset << 2)); in gmu_read()
106 static inline void gmu_write(struct a6xx_gmu *gmu, u32 offset, u32 value) in gmu_write() argument
108 msm_writel(value, gmu->mmio + (offset << 2)); in gmu_write()
112 gmu_write_bulk(struct a6xx_gmu *gmu, u32 offset, const u32 *data, u32 size) in gmu_write_bulk() argument
114 memcpy_toio(gmu->mmio + (offset << 2), data, size); in gmu_write_bulk()
118 static inline void gmu_rmw(struct a6xx_gmu *gmu, u32 reg, u32 mask, u32 or) in gmu_rmw() argument
120 u32 val = gmu_read(gmu, reg); in gmu_rmw()
124 gmu_write(gmu, reg, val | or); in gmu_rmw()
127 static inline u64 gmu_read64(struct a6xx_gmu *gmu, u3 argument
141 gmu_read_rscc(struct a6xx_gmu *gmu, u32 offset) gmu_read_rscc() argument
146 gmu_write_rscc(struct a6xx_gmu *gmu, u32 offset, u32 value) gmu_write_rscc() argument
[all...]
H A Da6xx_hfi.c26 static int a6xx_hfi_queue_read(struct a6xx_gmu *gmu, in a6xx_hfi_queue_read() argument
57 if (!gmu->legacy) in a6xx_hfi_queue_read()
64 static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu, in a6xx_hfi_queue_write() argument
88 if (!gmu->legacy) { in a6xx_hfi_queue_write()
96 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01); in a6xx_hfi_queue_write()
100 static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum, in a6xx_hfi_wait_for_ack() argument
103 struct a6xx_hfi_queue *queue = &gmu->queues[HFI_RESPONSE_QUEUE]; in a6xx_hfi_wait_for_ack()
108 ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_GMU2HOST_INTR_INFO, val, in a6xx_hfi_wait_for_ack()
112 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
119 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CL in a6xx_hfi_wait_for_ack()
169 a6xx_hfi_send_msg(struct a6xx_gmu *gmu, int id, void *data, u32 size, u32 *payload, u32 payload_size) a6xx_hfi_send_msg() argument
192 a6xx_hfi_send_gmu_init(struct a6xx_gmu *gmu, int boot_state) a6xx_hfi_send_gmu_init() argument
204 a6xx_hfi_get_fw_version(struct a6xx_gmu *gmu, u32 *version) a6xx_hfi_get_fw_version() argument
215 a6xx_hfi_send_perf_table_v1(struct a6xx_gmu *gmu) a6xx_hfi_send_perf_table_v1() argument
237 a6xx_hfi_send_perf_table(struct a6xx_gmu *gmu) a6xx_hfi_send_perf_table() argument
547 a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu) a6xx_hfi_send_bw_table() argument
574 a6xx_hfi_send_test(struct a6xx_gmu *gmu) a6xx_hfi_send_test() argument
582 a6xx_hfi_send_start(struct a6xx_gmu *gmu) a6xx_hfi_send_start() argument
590 a6xx_hfi_send_core_fw_start(struct a6xx_gmu *gmu) a6xx_hfi_send_core_fw_start() argument
598 a6xx_hfi_set_freq(struct a6xx_gmu *gmu, int index) a6xx_hfi_set_freq() argument
610 a6xx_hfi_send_prep_slumber(struct a6xx_gmu *gmu) a6xx_hfi_send_prep_slumber() argument
620 a6xx_hfi_start_v1(struct a6xx_gmu *gmu, int boot_state) a6xx_hfi_start_v1() argument
655 a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state) a6xx_hfi_start() argument
686 a6xx_hfi_stop(struct a6xx_gmu *gmu) a6xx_hfi_stop() argument
734 a6xx_hfi_init(struct a6xx_gmu *gmu) a6xx_hfi_init() argument
[all...]
H A Da6xx_gpu.c24 if (!adreno_has_gmu_wrapper(adreno_gpu) && !a6xx_gmu_isidle(&a6xx_gpu->gmu)) in _a6xx_check_idle()
702 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_set_hwcg() local
725 gmu_rmw(gmu, REG_A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 1, 0); in a6xx_set_hwcg()
732 gmu_rmw(gmu, REG_A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 0, 1); in a6xx_set_hwcg()
1199 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in hw_init() local
1204 ret = a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); in hw_init()
1225 a6xx_sptprac_enable(gmu); in hw_init()
1359 gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GPU_CX_BUSY_MAS in hw_init()
1494 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_recover() local
1932 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_pm_resume() local
2010 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_pm_suspend() local
[all...]
H A Da6xx_gpu.h23 struct a6xx_gmu gmu; member
86 int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu);
88 bool a6xx_gmu_isidle(struct a6xx_gmu *gmu);
90 int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
91 void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
H A Da6xx_gpu_state.c144 if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu)) in a6xx_crashdumper_run()
784 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in _a6xx_get_gmu_registers() local
804 val = gmu_read_rscc(gmu, offset); in _a6xx_get_gmu_registers()
806 val = gmu_read(gmu, offset); in _a6xx_get_gmu_registers()
833 if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) in a6xx_get_gmu_registers()
871 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_snapshot_gmu_hfi_history() local
874 BUILD_BUG_ON(ARRAY_SIZE(gmu->queues) != ARRAY_SIZE(a6xx_state->hfi_queue_history)); in a6xx_snapshot_gmu_hfi_history()
876 for (i = 0; i < ARRAY_SIZE(gmu in a6xx_snapshot_gmu_hfi_history()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/adreno/
H A Da6xx_gmu.c17 static void a6xx_gmu_fault(struct a6xx_gmu *gmu) in a6xx_gmu_fault() argument
19 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_gmu_fault()
26 gmu->hung = true; in a6xx_gmu_fault()
37 struct a6xx_gmu *gmu = data; in a6xx_gmu_irq() local
40 status = gmu_read(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_STATUS); in a6xx_gmu_irq()
41 gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, status); in a6xx_gmu_irq()
44 dev_err_ratelimited(gmu->dev, "GMU watchdog expired\n"); in a6xx_gmu_irq()
46 a6xx_gmu_fault(gmu); in a6xx_gmu_irq()
50 dev_err_ratelimited(gmu in a6xx_gmu_irq()
61 struct a6xx_gmu *gmu = data; a6xx_hfi_irq() local
76 a6xx_gmu_sptprac_is_on(struct a6xx_gmu *gmu) a6xx_gmu_sptprac_is_on() argument
92 a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu) a6xx_gmu_gx_is_on() argument
111 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_set_freq() local
171 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_get_freq() local
176 a6xx_gmu_check_idle_level(struct a6xx_gmu *gmu) a6xx_gmu_check_idle_level() argument
197 a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu) a6xx_gmu_wait_for_idle() argument
202 a6xx_gmu_start(struct a6xx_gmu *gmu) a6xx_gmu_start() argument
235 a6xx_gmu_hfi_start(struct a6xx_gmu *gmu) a6xx_gmu_hfi_start() argument
251 a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) a6xx_gmu_set_oob() argument
313 a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) a6xx_gmu_clear_oob() argument
348 a6xx_sptprac_enable(struct a6xx_gmu *gmu) a6xx_sptprac_enable() argument
370 a6xx_sptprac_disable(struct a6xx_gmu *gmu) a6xx_sptprac_disable() argument
392 a6xx_gmu_gfx_rail_on(struct a6xx_gmu *gmu) a6xx_gmu_gfx_rail_on() argument
410 a6xx_gmu_notify_slumber(struct a6xx_gmu *gmu) a6xx_gmu_notify_slumber() argument
447 a6xx_rpmh_start(struct a6xx_gmu *gmu) a6xx_rpmh_start() argument
482 a6xx_rpmh_stop(struct a6xx_gmu *gmu) a6xx_rpmh_stop() argument
505 a6xx_gmu_rpmh_init(struct a6xx_gmu *gmu) a6xx_gmu_rpmh_init() argument
617 a6xx_gmu_power_config(struct a6xx_gmu *gmu) a6xx_gmu_power_config() argument
675 a6xx_gmu_fw_load(struct a6xx_gmu *gmu) a6xx_gmu_fw_load() argument
731 a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state) a6xx_gmu_fw_start() argument
827 a6xx_gmu_irq_disable(struct a6xx_gmu *gmu) a6xx_gmu_irq_disable() argument
836 a6xx_gmu_rpmh_off(struct a6xx_gmu *gmu) a6xx_gmu_rpmh_off() argument
852 a6xx_gmu_force_off(struct a6xx_gmu *gmu) a6xx_gmu_force_off() argument
867 a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu) a6xx_gmu_set_initial_freq() argument
881 a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu) a6xx_gmu_set_initial_bw() argument
898 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_resume() local
976 a6xx_gmu_isidle(struct a6xx_gmu *gmu) a6xx_gmu_isidle() argument
1022 a6xx_gmu_shutdown(struct a6xx_gmu *gmu) a6xx_gmu_shutdown() argument
1080 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_stop() local
1113 a6xx_gmu_memory_free(struct a6xx_gmu *gmu) a6xx_gmu_memory_free() argument
1126 a6xx_gmu_memory_alloc(struct a6xx_gmu *gmu, struct a6xx_gmu_bo *bo, size_t size, u64 iova) a6xx_gmu_memory_alloc() argument
1165 a6xx_gmu_memory_probe(struct a6xx_gmu *gmu) a6xx_gmu_memory_probe() argument
1283 a6xx_gmu_rpmh_votes_init(struct a6xx_gmu *gmu) a6xx_gmu_rpmh_votes_init() argument
1333 a6xx_gmu_pwrlevels_probe(struct a6xx_gmu *gmu) a6xx_gmu_pwrlevels_probe() argument
1367 a6xx_gmu_clocks_probe(struct a6xx_gmu *gmu) a6xx_gmu_clocks_probe() argument
1403 a6xx_gmu_get_irq(struct a6xx_gmu *gmu, struct platform_device *pdev, const char *name, irq_handler_t handler) a6xx_gmu_get_irq() argument
1424 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_remove() local
1457 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; a6xx_gmu_init() local
[all...]
H A Da6xx_hfi.c26 static int a6xx_hfi_queue_read(struct a6xx_gmu *gmu, in a6xx_hfi_queue_read() argument
55 if (!gmu->legacy) in a6xx_hfi_queue_read()
62 static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu, in a6xx_hfi_queue_write() argument
84 if (!gmu->legacy) { in a6xx_hfi_queue_write()
92 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01); in a6xx_hfi_queue_write()
96 static int a6xx_hfi_wait_for_ack(struct a6xx_gmu *gmu, u32 id, u32 seqnum, in a6xx_hfi_wait_for_ack() argument
99 struct a6xx_hfi_queue *queue = &gmu->queues[HFI_RESPONSE_QUEUE]; in a6xx_hfi_wait_for_ack()
104 ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_GMU2HOST_INTR_INFO, val, in a6xx_hfi_wait_for_ack()
108 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
115 gmu_write(gmu, REG_A6XX_GMU_GMU2HOST_INTR_CL in a6xx_hfi_wait_for_ack()
165 a6xx_hfi_send_msg(struct a6xx_gmu *gmu, int id, void *data, u32 size, u32 *payload, u32 payload_size) a6xx_hfi_send_msg() argument
188 a6xx_hfi_send_gmu_init(struct a6xx_gmu *gmu, int boot_state) a6xx_hfi_send_gmu_init() argument
200 a6xx_hfi_get_fw_version(struct a6xx_gmu *gmu, u32 *version) a6xx_hfi_get_fw_version() argument
211 a6xx_hfi_send_perf_table_v1(struct a6xx_gmu *gmu) a6xx_hfi_send_perf_table_v1() argument
233 a6xx_hfi_send_perf_table(struct a6xx_gmu *gmu) a6xx_hfi_send_perf_table() argument
392 a6xx_hfi_send_bw_table(struct a6xx_gmu *gmu) a6xx_hfi_send_bw_table() argument
411 a6xx_hfi_send_test(struct a6xx_gmu *gmu) a6xx_hfi_send_test() argument
419 a6xx_hfi_send_start(struct a6xx_gmu *gmu) a6xx_hfi_send_start() argument
427 a6xx_hfi_send_core_fw_start(struct a6xx_gmu *gmu) a6xx_hfi_send_core_fw_start() argument
435 a6xx_hfi_set_freq(struct a6xx_gmu *gmu, int index) a6xx_hfi_set_freq() argument
447 a6xx_hfi_send_prep_slumber(struct a6xx_gmu *gmu) a6xx_hfi_send_prep_slumber() argument
457 a6xx_hfi_start_v1(struct a6xx_gmu *gmu, int boot_state) a6xx_hfi_start_v1() argument
492 a6xx_hfi_start(struct a6xx_gmu *gmu, int boot_state) a6xx_hfi_start() argument
523 a6xx_hfi_stop(struct a6xx_gmu *gmu) a6xx_hfi_stop() argument
565 a6xx_hfi_init(struct a6xx_gmu *gmu) a6xx_hfi_init() argument
[all...]
H A Da6xx_gmu.h90 static inline u32 gmu_read(struct a6xx_gmu *gmu, u32 offset) in gmu_read() argument
92 return msm_readl(gmu->mmio + (offset << 2)); in gmu_read()
95 static inline void gmu_write(struct a6xx_gmu *gmu, u32 offset, u32 value) in gmu_write() argument
97 return msm_writel(value, gmu->mmio + (offset << 2)); in gmu_write()
101 gmu_write_bulk(struct a6xx_gmu *gmu, u32 offset, const u32 *data, u32 size) in gmu_write_bulk() argument
103 memcpy_toio(gmu->mmio + (offset << 2), data, size); in gmu_write_bulk()
107 static inline void gmu_rmw(struct a6xx_gmu *gmu, u32 reg, u32 mask, u32 or) in gmu_rmw() argument
109 u32 val = gmu_read(gmu, reg); in gmu_rmw()
113 gmu_write(gmu, reg, val | or); in gmu_rmw()
116 static inline u64 gmu_read64(struct a6xx_gmu *gmu, u3 argument
130 gmu_read_rscc(struct a6xx_gmu *gmu, u32 offset) gmu_read_rscc() argument
135 gmu_write_rscc(struct a6xx_gmu *gmu, u32 offset, u32 value) gmu_write_rscc() argument
[all...]
H A Da6xx_gpu.h33 struct a6xx_gmu gmu; member
75 int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu);
77 bool a6xx_gmu_isidle(struct a6xx_gmu *gmu);
79 int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
80 void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
H A Da6xx_gpu.c21 if (!a6xx_gmu_isidle(&a6xx_gpu->gmu)) in _a6xx_check_idle()
431 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_set_hwcg() local
451 gmu_rmw(gmu, REG_A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 1, 0); in a6xx_set_hwcg()
457 gmu_rmw(gmu, REG_A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 0, 1); in a6xx_set_hwcg()
715 a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); in a6xx_hw_init()
934 a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); in a6xx_hw_init()
936 if (a6xx_gpu->gmu.legacy) { in a6xx_hw_init()
938 a6xx_gmu_clear_oob(&a6xx_gpu->gmu, GMU_OOB_BOOT_SLUMBER); in a6xx_hw_init()
973 gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIV in a6xx_recover()
[all...]
H A Da6xx_gpu_state.c136 if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu)) in a6xx_crashdumper_run()
744 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in _a6xx_get_gmu_registers() local
764 val = gmu_read_rscc(gmu, offset); in _a6xx_get_gmu_registers()
766 val = gmu_read(gmu, offset); in _a6xx_get_gmu_registers()
793 if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) in a6xx_get_gmu_registers()
925 if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) in a6xx_gpu_state_get()
1179 drm_puts(p, "registers-gmu:\n"); in a6xx_show()

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