| /kernel/linux/linux-5.10/drivers/clk/uniphier/ |
| H A D | clk-uniphier-cpugear.c | 30 struct uniphier_clk_cpugear *gear = to_uniphier_clk_cpugear(hw); in uniphier_clk_cpugear_set_parent() local
34 ret = regmap_write_bits(gear->regmap, in uniphier_clk_cpugear_set_parent()
35 gear->regbase + UNIPHIER_CLK_CPUGEAR_SET, in uniphier_clk_cpugear_set_parent()
36 gear->mask, index); in uniphier_clk_cpugear_set_parent()
40 ret = regmap_write_bits(gear->regmap, in uniphier_clk_cpugear_set_parent()
41 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
47 return regmap_read_poll_timeout(gear->regmap, in uniphier_clk_cpugear_set_parent()
48 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
55 struct uniphier_clk_cpugear *gear = to_uniphier_clk_cpugear(hw); in uniphier_clk_cpugear_get_parent() local
60 ret = regmap_read(gear in uniphier_clk_cpugear_get_parent()
81 struct uniphier_clk_cpugear *gear; uniphier_clk_register_cpugear() local
[all...] |
| /kernel/linux/linux-6.6/drivers/clk/uniphier/ |
| H A D | clk-uniphier-cpugear.c | 30 struct uniphier_clk_cpugear *gear = to_uniphier_clk_cpugear(hw); in uniphier_clk_cpugear_set_parent() local
34 ret = regmap_write_bits(gear->regmap, in uniphier_clk_cpugear_set_parent()
35 gear->regbase + UNIPHIER_CLK_CPUGEAR_SET, in uniphier_clk_cpugear_set_parent()
36 gear->mask, index); in uniphier_clk_cpugear_set_parent()
40 ret = regmap_write_bits(gear->regmap, in uniphier_clk_cpugear_set_parent()
41 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
47 return regmap_read_poll_timeout(gear->regmap, in uniphier_clk_cpugear_set_parent()
48 gear->regbase + UNIPHIER_CLK_CPUGEAR_UPD, in uniphier_clk_cpugear_set_parent()
55 struct uniphier_clk_cpugear *gear = to_uniphier_clk_cpugear(hw); in uniphier_clk_cpugear_get_parent() local
60 ret = regmap_read(gear in uniphier_clk_cpugear_get_parent()
81 struct uniphier_clk_cpugear *gear; uniphier_clk_register_cpugear() local
[all...] |
| /kernel/linux/linux-5.10/drivers/scsi/ufs/ |
| H A D | ufs-qcom.c | 391 static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear, in ufs_qcom_cfg_timers() argument
431 if (gear == 0) { in ufs_qcom_cfg_timers()
432 dev_err(hba->dev, "%s: invalid gear = %d\n", __func__, gear); in ufs_qcom_cfg_timers()
466 if (gear > ARRAY_SIZE(hs_fr_table_rA)) { in ufs_qcom_cfg_timers()
469 __func__, gear, in ufs_qcom_cfg_timers()
473 tx_clk_cycles_per_us = hs_fr_table_rA[gear-1][1]; in ufs_qcom_cfg_timers()
475 if (gear > ARRAY_SIZE(hs_fr_table_rB)) { in ufs_qcom_cfg_timers()
478 __func__, gear, in ufs_qcom_cfg_timers()
482 tx_clk_cycles_per_us = hs_fr_table_rB[gear in ufs_qcom_cfg_timers()
[all...] |
| H A D | ufs-exynos.c | 673 int gear = max_t(u32, pwr_req->gear_rx, pwr_req->gear_tx); in exynos_ufs_post_pwr_mode() local
678 if (!gear) in exynos_ufs_post_pwr_mode()
679 gear = 1; in exynos_ufs_post_pwr_mode()
697 gear, lanes); in exynos_ufs_post_pwr_mode()
700 "SLOW", gear, lanes); in exynos_ufs_post_pwr_mode()
|
| /kernel/linux/linux-6.6/drivers/ufs/host/ |
| H A D | ufs-qcom.c | 431 * negotiating maximum supported gear as G3. in ufs_qcom_get_hs_gear()
432 * Hence downgrade the maximum supported gear to HS-G2. in ufs_qcom_get_hs_gear()
534 static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear, in ufs_qcom_cfg_timers() argument
573 if (gear == 0) { in ufs_qcom_cfg_timers()
574 dev_err(hba->dev, "%s: invalid gear = %d\n", __func__, gear); in ufs_qcom_cfg_timers()
608 if (gear > ARRAY_SIZE(hs_fr_table_rA)) { in ufs_qcom_cfg_timers()
611 __func__, gear, in ufs_qcom_cfg_timers()
615 tx_clk_cycles_per_us = hs_fr_table_rA[gear-1][1]; in ufs_qcom_cfg_timers()
617 if (gear > ARRAY_SIZ in ufs_qcom_cfg_timers()
859 int gear = max_t(u32, p->gear_rx, p->gear_tx); ufs_qcom_get_bw_table() local
[all...] |
| H A D | ufs-exynos.c | 816 int gear = max_t(u32, pwr_req->gear_rx, pwr_req->gear_tx); in exynos_ufs_post_pwr_mode() local
821 if (!gear) in exynos_ufs_post_pwr_mode()
822 gear = 1; in exynos_ufs_post_pwr_mode()
840 gear, lanes); in exynos_ufs_post_pwr_mode()
843 "SLOW", gear, lanes); in exynos_ufs_post_pwr_mode()
|
| /kernel/linux/linux-5.10/drivers/media/i2c/ |
| H A D | ad9389b.c | 269 u8 gear; in ad9389b_set_manual_pll_gear() local
272 * The TMDS PLL in AD9389b change gear when the chip is heated above a in ad9389b_set_manual_pll_gear()
273 * certain temperature. The output is disabled when the PLL change gear in ad9389b_set_manual_pll_gear()
277 * 0x98 [7] = enable manual gearing. 0x98 [6:4] = gear in ad9389b_set_manual_pll_gear()
279 * The pixel frequency ranges are based on readout of the gear the in ad9389b_set_manual_pll_gear()
285 gear = 0xc0; /* 4th gear */ in ad9389b_set_manual_pll_gear()
287 gear = 0xb0; /* 3rd gear */ in ad9389b_set_manual_pll_gear()
289 gear in ad9389b_set_manual_pll_gear()
[all...] |