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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_job.c143 void amdgpu_job_set_resources(struct amdgpu_job *job, struct amdgpu_bo *gds, in amdgpu_job_set_resources() argument
146 if (gds) { in amdgpu_job_set_resources()
147 job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT; in amdgpu_job_set_resources()
148 job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT; in amdgpu_job_set_resources()
H A Damdgpu_job.h95 void amdgpu_job_set_resources(struct amdgpu_job *job, struct amdgpu_bo *gds,
H A Dgfx_v9_0.c783 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v9_0_kiq_set_resources()
4312 WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
4324 adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
4552 (adev->gds.gds_size)) { in gfx_v9_0_ecc_late_init()
5273 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v9_0_ring_emit_ib_compute()
5542 AMDGPU_CSA_SIZE - adev->gds.gds_size, in gfx_v9_0_ring_emit_de_meta()
7116 /* init asci gds info */ in gfx_v9_0_set_gds_init()
7121 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
7126 adev->gds in gfx_v9_0_set_gds_init()
[all...]
H A Damdgpu_kms.c665 gds_info.compute_partition_size = adev->gds.gds_size; in amdgpu_info_ioctl()
666 gds_info.gds_total_size = adev->gds.gds_size; in amdgpu_info_ioctl()
667 gds_info.gws_per_compute_partition = adev->gds.gws_size; in amdgpu_info_ioctl()
668 gds_info.oa_per_compute_partition = adev->gds.oa_size; in amdgpu_info_ioctl()
H A Damdgpu_ttm.c1963 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GDS, adev->gds.gds_size); in amdgpu_ttm_init()
1969 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GWS, adev->gds.gws_size); in amdgpu_ttm_init()
1975 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_OA, adev->gds.oa_size); in amdgpu_ttm_init()
H A Dgfx_v9_4_3.c75 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v9_4_3_kiq_set_resources()
2528 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v9_4_3_ring_emit_ib_compute()
4233 /* init asci gds info */ in gfx_v9_4_3_set_gds_init()
4239 adev->gds.gds_size = 0; in gfx_v9_4_3_set_gds_init()
4242 adev->gds.gds_size = 0x10000; in gfx_v9_4_3_set_gds_init()
4249 adev->gds.gds_compute_max_wave_id = 0; in gfx_v9_4_3_set_gds_init()
4253 adev->gds.gds_compute_max_wave_id = 0x7ff; in gfx_v9_4_3_set_gds_init()
4257 adev->gds.gws_size = 64; in gfx_v9_4_3_set_gds_init()
4258 adev->gds in gfx_v9_4_3_set_gds_init()
[all...]
H A Dgfx_v7_0.c2247 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v7_0_ring_emit_ib_compute()
5086 /* init asci gds info */ in gfx_v7_0_set_gds_init()
5087 adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v7_0_set_gds_init()
5088 adev->gds.gws_size = 64; in gfx_v7_0_set_gds_init()
5089 adev->gds.oa_size = 16; in gfx_v7_0_set_gds_init()
5090 adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID); in gfx_v7_0_set_gds_init()
H A Dgfx_v11_0.c145 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx11_kiq_set_resources()
5351 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v11_0_ring_emit_ib_compute()
5612 AMDGPU_CSA_SIZE - adev->gds.gds_size, in gfx_v11_0_ring_emit_de_meta()
6274 adev->gds.gds_size = 0x1000; in gfx_v11_0_set_gds_init()
6275 adev->gds.gds_compute_max_wave_id = total_cu * 32 - 1; in gfx_v11_0_set_gds_init()
6276 adev->gds.gws_size = 64; in gfx_v11_0_set_gds_init()
6277 adev->gds.oa_size = 16; in gfx_v11_0_set_gds_init()
H A Damdgpu.h956 struct amdgpu_gds gds; member
H A Dmes_v11_0.c374 mes_set_hw_res_pkt.gds_size = adev->gds.gds_size; in mes_v11_0_set_hw_resources()
H A Dmes_v10_1.c283 mes_set_hw_res_pkt.gds_size = adev->gds.gds_size; in mes_v10_1_set_hw_resources()
H A Dgfx_v8_0.c4350 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v8_0_kiq_kcq_enable()
6138 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v8_0_ring_emit_ib_compute()
7063 /* init asci gds info */ in gfx_v8_0_set_gds_init()
7064 adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v8_0_set_gds_init()
7065 adev->gds.gws_size = 64; in gfx_v8_0_set_gds_init()
7066 adev->gds.oa_size = 16; in gfx_v8_0_set_gds_init()
7067 adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID); in gfx_v8_0_set_gds_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_cs.c505 struct amdgpu_bo *gds; in amdgpu_cs_parser_bos() local
605 gds = p->bo_list->gds_obj; in amdgpu_cs_parser_bos()
618 if (gds) { in amdgpu_cs_parser_bos()
619 p->job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT; in amdgpu_cs_parser_bos()
620 p->job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT; in amdgpu_cs_parser_bos()
H A Damdgpu_kms.c613 gds_info.compute_partition_size = adev->gds.gds_size; in amdgpu_info_ioctl()
614 gds_info.gds_total_size = adev->gds.gds_size; in amdgpu_info_ioctl()
615 gds_info.gws_per_compute_partition = adev->gds.gws_size; in amdgpu_info_ioctl()
616 gds_info.oa_per_compute_partition = adev->gds.oa_size; in amdgpu_info_ioctl()
H A Dgfx_v9_0.c827 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v9_0_kiq_set_resources()
4478 WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
4490 adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
5327 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v9_0_ring_emit_ib_compute()
6921 /* init asci gds info */ in gfx_v9_0_set_gds_init()
6926 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
6930 adev->gds.gds_size = 0x1000; in gfx_v9_0_set_gds_init()
6933 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
6940 adev->gds in gfx_v9_0_set_gds_init()
[all...]
H A Damdgpu_ttm.c1986 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GDS, adev->gds.gds_size); in amdgpu_ttm_init()
1992 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GWS, adev->gds.gws_size); in amdgpu_ttm_init()
1998 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_OA, adev->gds.oa_size); in amdgpu_ttm_init()
H A Damdgpu_amdkfd.c580 return adev->gds.gws_size; in amdgpu_amdkfd_get_num_gws()
H A Dmes_v10_1.c237 mes_set_hw_res_pkt.gds_size = adev->gds.gds_size; in mes_v10_1_set_hw_resources()
H A Dgfx_v7_0.c2308 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v7_0_ring_emit_ib_compute()
5146 /* init asci gds info */ in gfx_v7_0_set_gds_init()
5147 adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v7_0_set_gds_init()
5148 adev->gds.gws_size = 64; in gfx_v7_0_set_gds_init()
5149 adev->gds.oa_size = 16; in gfx_v7_0_set_gds_init()
5150 adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID); in gfx_v7_0_set_gds_init()
H A Damdgpu.h914 struct amdgpu_gds gds; member
H A Dgfx_v8_0.c4384 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v8_0_kiq_kcq_enable()
6166 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v8_0_ring_emit_ib_compute()
7027 /* init asci gds info */ in gfx_v8_0_set_gds_init()
7028 adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v8_0_set_gds_init()
7029 adev->gds.gws_size = 64; in gfx_v8_0_set_gds_init()
7030 adev->gds.oa_size = 16; in gfx_v8_0_set_gds_init()
7031 adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID); in gfx_v8_0_set_gds_init()
/kernel/linux/linux-6.6/drivers/base/
H A Dcpu.c605 CPU_SHOW_VULN_FALLBACK(gds); variable
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_device.c516 node->adev->gds.gws_size, &node->gws); in kfd_gws_init()
544 node->adev->gds.gws_size); in kfd_init_node()
H A Dkfd_process_queue_manager.c148 pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0; in pqm_set_gws()
H A Dkfd_topology.c2013 dev->gpu->adev->gds.gws_size : 0; in kfd_topology_add_device()

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