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Searched refs:gcu_addr (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_dev.c183 gcu_status = malidp_read32(d71->gcu_addr, GLB_IRQ_STATUS); in d71_irq_handler()
186 raw_status = malidp_read32(d71->gcu_addr, BLK_IRQ_RAW_STATUS); in d71_irq_handler()
192 status = malidp_read32(d71->gcu_addr, BLK_STATUS); in d71_irq_handler()
195 malidp_write32_mask(d71->gcu_addr, BLK_STATUS, in d71_irq_handler()
200 malidp_write32(d71->gcu_addr, BLK_IRQ_CLEAR, raw_status); in d71_irq_handler()
224 malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, in d71_enable_irq()
244 malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, ENABLED_GCU_IRQS, 0); in d71_disable_irq()
289 malidp_write32_mask(d71->gcu_addr, BLK_CONTROL, 0x7, opmode); in d71_change_opmode()
291 ret = dp_wait_cond(((malidp_read32(d71->gcu_addr, BLK_CONTROL) & 0x7) == opmode), in d71_change_opmode()
304 malidp_write32(d71->gcu_addr, reg_offse in d71_flush()
[all...]
H A Dd71_dev.h36 u32 __iomem *gcu_addr; member
H A Dd71_component.c1362 get_values_from_reg(d71->gcu_addr, 0, 3, v); in d71_gcu_dump()
1367 get_values_from_reg(d71->gcu_addr, 0x10, 1, v); in d71_gcu_dump()
1370 get_values_from_reg(d71->gcu_addr, 0xA0, 5, v); in d71_gcu_dump()
1377 get_values_from_reg(d71->gcu_addr, 0xD0, 3, v); in d71_gcu_dump()
/kernel/linux/linux-6.6/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_dev.c184 gcu_status = malidp_read32(d71->gcu_addr, GLB_IRQ_STATUS); in d71_irq_handler()
187 raw_status = malidp_read32(d71->gcu_addr, BLK_IRQ_RAW_STATUS); in d71_irq_handler()
193 status = malidp_read32(d71->gcu_addr, BLK_STATUS); in d71_irq_handler()
196 malidp_write32_mask(d71->gcu_addr, BLK_STATUS, in d71_irq_handler()
201 malidp_write32(d71->gcu_addr, BLK_IRQ_CLEAR, raw_status); in d71_irq_handler()
225 malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, in d71_enable_irq()
245 malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, ENABLED_GCU_IRQS, 0); in d71_disable_irq()
290 malidp_write32_mask(d71->gcu_addr, BLK_CONTROL, 0x7, opmode); in d71_change_opmode()
292 ret = dp_wait_cond(((malidp_read32(d71->gcu_addr, BLK_CONTROL) & 0x7) == opmode), in d71_change_opmode()
305 malidp_write32(d71->gcu_addr, reg_offse in d71_flush()
[all...]
H A Dd71_dev.h36 u32 __iomem *gcu_addr; member
H A Dd71_component.c1362 get_values_from_reg(d71->gcu_addr, 0, 3, v); in d71_gcu_dump()
1367 get_values_from_reg(d71->gcu_addr, 0x10, 1, v); in d71_gcu_dump()
1370 get_values_from_reg(d71->gcu_addr, 0xA0, 5, v); in d71_gcu_dump()
1377 get_values_from_reg(d71->gcu_addr, 0xD0, 3, v); in d71_gcu_dump()

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