Searched refs:gcp (Results 1 - 10 of 10) sorted by relevance
/kernel/linux/linux-5.10/arch/arm/mach-sa1100/ |
H A D | neponset.c | 205 static int neponset_init_gpio(struct gpio_chip **gcp, in neponset_init_gpio() argument 216 *gcp = gc; in neponset_init_gpio()
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/kernel/linux/linux-6.6/arch/arm/mach-sa1100/ |
H A D | neponset.c | 205 static int neponset_init_gpio(struct gpio_chip **gcp, in neponset_init_gpio() argument 216 *gcp = gc; in neponset_init_gpio()
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/kernel/linux/linux-6.6/drivers/gpu/drm/vc4/ |
H A D | vc4_hdmi.c | 1551 unsigned char gcp; in vc5_hdmi_set_timings() local 1585 gcp = 6; in vc5_hdmi_set_timings() 1588 gcp = 5; in vc5_hdmi_set_timings() 1592 gcp = 0; in vc5_hdmi_set_timings() 1601 gcp = 0; in vc5_hdmi_set_timings() 1608 VC4_SET_FIELD(gcp, VC5_HDMI_DEEP_COLOR_CONFIG_1_COLOR_DEPTH); in vc5_hdmi_set_timings() 1613 reg |= VC4_SET_FIELD(gcp, VC5_HDMI_GCP_WORD_1_GCP_SUBPACKET_BYTE_1); in vc5_hdmi_set_timings()
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
H A D | intel_crtc_state_dump.c | 277 pipe_config->infoframes.gcp); in intel_crtc_state_dump()
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H A D | intel_hdmi.c | 981 intel_de_write(dev_priv, reg, crtc_state->infoframes.gcp); in intel_hdmi_set_gcp_infoframe() 1006 crtc_state->infoframes.gcp = intel_de_read(dev_priv, reg); in intel_hdmi_read_gcp_infoframe() 1023 crtc_state->infoframes.gcp |= GCP_COLOR_INDICATION; in intel_hdmi_compute_gcp_infoframe() 1028 crtc_state->infoframes.gcp |= GCP_DEFAULT_PHASE_ENABLE; in intel_hdmi_compute_gcp_infoframe()
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H A D | intel_display_types.h | 1312 u32 gcp; member
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H A D | intel_display.c | 5370 PIPE_CONF_CHECK_X(infoframes.gcp); in intel_pipe_config_compare()
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
H A D | intel_hdmi.c | 1003 intel_de_write(dev_priv, reg, crtc_state->infoframes.gcp); in intel_hdmi_set_gcp_infoframe() 1028 crtc_state->infoframes.gcp = intel_de_read(dev_priv, reg); in intel_hdmi_read_gcp_infoframe() 1045 crtc_state->infoframes.gcp |= GCP_COLOR_INDICATION; in intel_hdmi_compute_gcp_infoframe() 1050 crtc_state->infoframes.gcp |= GCP_DEFAULT_PHASE_ENABLE; in intel_hdmi_compute_gcp_infoframe()
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H A D | intel_display_types.h | 1021 u32 gcp; member
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H A D | intel_display.c | 13132 pipe_config->infoframes.gcp); in intel_dump_pipe_config() 14033 PIPE_CONF_CHECK_X(infoframes.gcp); in intel_pipe_config_compare()
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