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/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dcgrp.c37 struct nvkm_engn *engn = ectx->engn; in nvkm_cgrp_ectx_put() local
40 CGRP_TRACE(cgrp, "dtor ectx %d[%s]", engn->id, engn->engine->subdev.name); in nvkm_cgrp_ectx_put()
51 nvkm_cgrp_ectx_get(struct nvkm_cgrp *cgrp, struct nvkm_engn *engn, struct nvkm_ectx **pectx, in nvkm_cgrp_ectx_get() argument
54 struct nvkm_engine *engine = engn->engine; in nvkm_cgrp_ectx_get()
63 ectx = nvkm_list_find(ectx, &cgrp->ectxs, head, ectx->engn == engn); in nvkm_cgrp_ectx_get()
71 CGRP_TRACE(cgrp, "ctor ectx %d[%s]", engn->id, engn in nvkm_cgrp_ectx_get()
98 struct nvkm_engn *engn = vctx->ectx->engn; nvkm_cgrp_vctx_put() local
119 nvkm_cgrp_vctx_get(struct nvkm_cgrp *cgrp, struct nvkm_engn *engn, struct nvkm_chan *chan, struct nvkm_vctx **pvctx, struct nvkm_client *client) nvkm_cgrp_vctx_get() argument
[all...]
H A Drunl.c34 nvkm_engn_cgrp_get(struct nvkm_engn *engn, unsigned long *pirqflags) in nvkm_engn_cgrp_get() argument
41 id = engn->func->cxid(engn, &cgid); in nvkm_engn_cgrp_get()
46 chan = nvkm_runl_chan_get_chid(engn->runl, id, pirqflags); in nvkm_engn_cgrp_get()
50 cgrp = nvkm_runl_cgrp_get_cgid(engn->runl, id, pirqflags); in nvkm_engn_cgrp_get()
63 struct nvkm_engn *engn; in nvkm_runl_rc() local
101 nvkm_runl_foreach_engn_cond(engn, runl, engn->func->cxid) { in nvkm_runl_rc()
102 cgrp = nvkm_engn_cgrp_get(engn, &flags); in nvkm_runl_rc()
104 ENGN_DEBUG(engn, "cxi in nvkm_runl_rc()
155 nvkm_runl_rc_engn(struct nvkm_runl *runl, struct nvkm_engn *engn) nvkm_runl_rc_engn() argument
320 struct nvkm_engn *engn, *engt; nvkm_runl_del() local
344 struct nvkm_engn *engn; nvkm_runl_add() local
[all...]
H A Dchan.c42 nvkm_chan_cctx_bind(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx *cctx) in nvkm_chan_cctx_bind() argument
46 struct nvkm_engine *engine = engn->engine; in nvkm_chan_cctx_bind()
48 if (!engn->func->bind) in nvkm_chan_cctx_bind()
51 CHAN_TRACE(chan, "%sbind cctx %d[%s]", cctx ? "" : "un", engn->id, engine->subdev.name); in nvkm_chan_cctx_bind()
63 engn->func->bind(engn, cctx, chan); in nvkm_chan_cctx_bind()
78 struct nvkm_engn *engn = cctx->vctx->ectx->engn; in nvkm_chan_cctx_put() local
81 CHAN_TRACE(chan, "dtor cctx %d[%s]", engn->id, engn in nvkm_chan_cctx_put()
93 nvkm_chan_cctx_get(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx **pcctx, struct nvkm_client *client) nvkm_chan_cctx_get() argument
312 struct nvkm_engn *engn; nvkm_chan_get_inst() local
333 struct nvkm_engn *engn; nvkm_chan_get_chid() local
[all...]
H A Dgf100.c161 gf100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gf100_ectx_bind() argument
166 switch (engn->engine->subdev.type) { in gf100_ectx_bind()
169 case NVKM_ENGINE_CE : ptr0 = 0x0230 + (engn->engine->subdev.inst * 0x10); break; in gf100_ectx_bind()
190 gf100_ectx_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx) in gf100_ectx_ctor() argument
202 gf100_engn_mmu_fault_triggered(struct nvkm_engn *engn) in gf100_engn_mmu_fault_triggered() argument
204 struct nvkm_runl *runl = engn->runl; in gf100_engn_mmu_fault_triggered()
207 u32 data = nvkm_rd32(device, 0x002a30 + (engn->id * 4)); in gf100_engn_mmu_fault_triggered()
209 ENGN_DEBUG(engn, "%08x: mmu fault triggered", data); in gf100_engn_mmu_fault_triggered()
214 nvkm_mask(device, 0x002a30 + (engn->id * 4), 0x00000100, 0x00000000); in gf100_engn_mmu_fault_triggered()
222 gf100_engn_mmu_fault_trigger(struct nvkm_engn *engn) in gf100_engn_mmu_fault_trigger() argument
247 gf100_engn_status(struct nvkm_engn *engn, struct gf100_engn_status *status) gf100_engn_status() argument
262 gf100_engn_cxid(struct nvkm_engn *engn, bool *cgid) gf100_engn_cxid() argument
276 gf100_engn_chsw(struct nvkm_engn *engn) gf100_engn_chsw() argument
541 struct nvkm_engn *engn; gf100_fifo_mmu_fault_recover() local
621 struct nvkm_engn *engn, *engn2; gf100_fifo_intr_ctxsw_timeout() local
648 struct nvkm_engn *engn; gf100_fifo_intr_sched_ctxsw() local
769 gf100_fifo_intr_engine_unit(struct nvkm_fifo *fifo, int engn) gf100_fifo_intr_engine_unit() argument
[all...]
H A Dg98.c39 nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_GR, 0); in g98_fifo_runl_ctor()
40 nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MSPPP, 0); in g98_fifo_runl_ctor()
41 nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_CE, 0); in g98_fifo_runl_ctor()
42 nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_MSPDEC, 0); in g98_fifo_runl_ctor()
43 nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_SEC, 0); in g98_fifo_runl_ctor()
44 nvkm_runl_add(runl, 6, fifo->func->engn, NVKM_ENGINE_MSVLD, 0); in g98_fifo_runl_ctor()
59 .engn = &g84_engn,
H A Duchan.c87 nvkm_chan_cctx_bind(chan, ectx->engn, NULL); in nvkm_uchan_object_fini_1()
120 nvkm_chan_cctx_bind(chan, ectx->engn, cctx); in nvkm_uchan_object_init_0()
134 struct nvkm_engn *engn; in nvkm_uchan_object_dtor() local
139 engn = uobj->cctx->vctx->ectx->engn; in nvkm_uchan_object_dtor()
140 if (engn->func->ramht_del) in nvkm_uchan_object_dtor()
141 engn->func->ramht_del(uobj->chan, uobj->hash); in nvkm_uchan_object_dtor()
159 struct nvkm_engn *engn; in nvkm_uchan_object_new() local
164 engn = nvkm_runl_find_engn(engn, cgr in nvkm_uchan_object_new()
207 struct nvkm_engn *engn; nvkm_uchan_sclass() local
[all...]
H A Dga100.c122 ga100_engn_cxid(struct nvkm_engn *engn, bool *cgid) in ga100_engn_cxid() argument
124 struct nvkm_runl *runl = engn->runl; in ga100_engn_cxid()
126 u32 stat = nvkm_rd32(device, runl->addr + 0x200 + engn->id * 0x40); in ga100_engn_cxid()
128 ENGN_DEBUG(engn, "status %08x", stat); in ga100_engn_cxid()
137 if (nvkm_engine_chsw_load(engn->engine)) in ga100_engn_cxid()
149 ga100_engn_nonstall(struct nvkm_engn *engn) in ga100_engn_nonstall() argument
151 struct nvkm_engine *engine = engn->engine; in ga100_engn_nonstall()
333 struct nvkm_engn *engn; in ga100_runl_intr() local
346 nvkm_runl_foreach_engn_cond(engn, runl, stat & BIT(engn in ga100_runl_intr()
444 struct nvkm_engn *engn; ga100_runl_new() local
549 struct nvkm_engn *engn = list_first_entry(&runl->engns, typeof(*engn), head); ga100_fifo_nonstall_ctor() local
[all...]
H A Dbase.c42 struct nvkm_engn *engn; in nvkm_fifo_ctxsw_in_progress() local
45 nvkm_runl_foreach_engn(engn, runl) { in nvkm_fifo_ctxsw_in_progress()
46 if (engn->engine == engine) in nvkm_fifo_ctxsw_in_progress()
47 return engn->func->chsw ? engn->func->chsw(engn) : false; in nvkm_fifo_ctxsw_in_progress()
78 if (oclass->engn == &fifo->func->cgrp.user) in nvkm_fifo_class_new()
81 if (oclass->engn == &fifo->func->chan.user) in nvkm_fifo_class_new()
105 oclass->engn = &fifo->func->cgrp.user; in nvkm_fifo_class_get()
115 oclass->engn in nvkm_fifo_class_get()
173 struct nvkm_engn *engn; nvkm_fifo_info() local
245 struct nvkm_engn *engn; nvkm_fifo_oneinit() local
[all...]
H A Dg84.c106 g84_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in g84_ectx_bind() argument
113 switch (engn->engine->subdev.type) { in g84_ectx_bind()
130 save = nvkm_mask(device, 0x002520, 0x0000003f, BIT(engn->id - 1)); in g84_ectx_bind()
200 nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_GR, 0); in g84_fifo_runl_ctor()
201 nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MPEG, 0); in g84_fifo_runl_ctor()
202 nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_ME, 0); in g84_fifo_runl_ctor()
203 nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_VP, 0); in g84_fifo_runl_ctor()
204 nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_CIPHER, 0); in g84_fifo_runl_ctor()
205 nvkm_runl_add(runl, 6, fifo->func->engn, NVKM_ENGINE_BSP, 0); in g84_fifo_runl_ctor()
220 .engn
[all...]
H A Dtu102.c136 tu102_fifo_intr_ctxsw_timeout_info(struct nvkm_engn *engn, u32 info) in tu102_fifo_intr_ctxsw_timeout_info() argument
138 struct nvkm_runl *runl = engn->runl; in tu102_fifo_intr_ctxsw_timeout_info()
143 ENGN_DEBUG(engn, "CTXSW_TIMEOUT %08x", info); in tu102_fifo_intr_ctxsw_timeout_info()
172 struct nvkm_engn *engn; in tu102_fifo_intr_ctxsw_timeout() local
177 nvkm_runl_foreach_engn_cond(engn, runl, engm & BIT(engn->id)) { in tu102_fifo_intr_ctxsw_timeout()
178 info = nvkm_rd32(device, 0x003200 + (engn->id * 4)); in tu102_fifo_intr_ctxsw_timeout()
179 tu102_fifo_intr_ctxsw_timeout_info(engn, info); in tu102_fifo_intr_ctxsw_timeout()
275 .engn = &gv100_engn,
H A Drunl.h114 #define nvkm_runl_find_engn(engn,runl,cond) nvkm_list_find(engn, &(runl)->engns, head, (cond))
119 #define nvkm_runl_foreach_engn(engn,runl) list_for_each_entry((engn), &(runl)->engns, head)
120 #define nvkm_runl_foreach_engn_cond(engn,runl,cond) \
121 nvkm_list_foreach(engn, &(runl)->engns, head, (cond))
H A Dgk104.c134 gk104_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gk104_ectx_bind() argument
139 switch (engn->engine->subdev.type) { in gk104_ectx_bind()
153 if (!engn->engine->subdev.inst) in gk104_ectx_bind()
178 gk104_ectx_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx) in gk104_ectx_ctor() argument
204 gk104_engn_status(struct nvkm_engn *engn, struct gk104_engn_status *status) in gk104_engn_status() argument
206 u32 stat = nvkm_rd32(engn->runl->fifo->engine.subdev.device, 0x002640 + (engn->id * 0x08)); in gk104_engn_status()
221 if (nvkm_engine_chsw_load(engn->engine)) in gk104_engn_status()
236 ENGN_DEBUG(engn, "%08x: busy %d faulted %d chsw %d save %d load %d %sid %d%s-> %sid %d%s", in gk104_engn_status()
245 gk104_engn_cxid(struct nvkm_engn *engn, boo argument
259 gk104_engn_chsw(struct nvkm_engn *engn) gk104_engn_chsw() argument
[all...]
H A Dnv40.c111 nv40_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan) in nv40_eobj_ramht_add() argument
115 u32 context = chan->id << 23 | engn->id << 20; in nv40_eobj_ramht_add()
125 nv40_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in nv40_ectx_bind() argument
133 switch (engn->engine->subdev.type) { in nv40_ectx_bind()
241 .engn = &nv40_engn,
H A Dgv100.c92 gv100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gv100_ectx_bind() argument
117 gv100_ectx_ce_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gv100_ectx_ce_bind() argument
129 gv100_ectx_ce_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx) in gv100_ectx_ce_ctor() argument
459 struct nvkm_engn *engn; in gv100_fifo_intr_ctxsw_timeout() local
462 nvkm_runl_foreach_engn_cond(engn, runl, engm & BIT(engn->id)) in gv100_fifo_intr_ctxsw_timeout()
463 nvkm_runl_rc_engn(runl, engn); in gv100_fifo_intr_ctxsw_timeout()
481 .engn = &gv100_engn,
H A Dnv50.c42 nv50_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan) in nv50_eobj_ramht_add() argument
44 return nvkm_ramht_insert(chan->ramht, eobj, 0, 4, eobj->handle, engn->id << 20); in nv50_eobj_ramht_add()
150 nv50_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in nv50_ectx_bind() argument
157 switch (engn->engine->subdev.type) { in nv50_ectx_bind()
387 .engn = &nv50_engn,
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dchan.c45 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; in nvkm_fifo_chan_child_fini() local
49 if (--engn->usecount) in nvkm_fifo_chan_child_fini()
61 if (engn->object) { in nvkm_fifo_chan_child_fini()
62 ret = nvkm_object_fini(engn->object, suspend); in nvkm_fifo_chan_child_fini()
78 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; in nvkm_fifo_chan_child_init() local
82 if (engn->usecount++) in nvkm_fifo_chan_child_init()
85 if (engn->object) { in nvkm_fifo_chan_child_init()
86 ret = nvkm_object_init(engn in nvkm_fifo_chan_child_init()
111 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; nvkm_fifo_chan_child_del() local
138 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; nvkm_fifo_chan_child_new() local
[all...]
H A Dgk104.c52 gk104_fifo_engine_status(struct gk104_fifo *fifo, int engn, in gk104_fifo_engine_status() argument
55 struct nvkm_engine *engine = fifo->engine[engn].engine; in gk104_fifo_engine_status()
58 u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x08)); in gk104_fifo_engine_status()
90 engn, status->busy, status->faulted, in gk104_fifo_engine_status()
103 if (oclass->engn == &fifo->func->chan) { in gk104_fifo_class_new()
104 const struct gk104_fifo_chan_user *user = oclass->engn; in gk104_fifo_class_new()
107 if (oclass->engn == &fifo->func->user) { in gk104_fifo_class_new()
108 const struct gk104_fifo_user_user *user = oclass->engn; in gk104_fifo_class_new()
124 oclass->engn = &fifo->func->user; in gk104_fifo_class_get()
130 oclass->engn in gk104_fifo_class_get()
282 int engn, runl; gk104_fifo_recover_work() local
364 unsigned long engn, engm = fifo->runlist[runl].engm; gk104_fifo_recover_chan() local
396 gk104_fifo_recover_engn(struct gk104_fifo *fifo, int engn) gk104_fifo_recover_engn() argument
475 int engn; gk104_fifo_fault() local
583 u32 engn; gk104_fifo_intr_sched_ctxsw() local
884 int runl = mthd - NV_DEVICE_FIFO_RUNLIST_ENGINES(0), engn; gk104_fifo_info() local
909 int engn, runl, pbid, ret, i, j; gk104_fifo_oneinit() local
[all...]
H A Dgf100.c109 gf100_fifo_engidx(struct gf100_fifo *fifo, u32 engn) in gf100_fifo_engidx() argument
111 switch (engn) { in gf100_fifo_engidx()
112 case NVKM_ENGINE_GR : engn = 0; break; in gf100_fifo_engidx()
113 case NVKM_ENGINE_MSVLD : engn = 1; break; in gf100_fifo_engidx()
114 case NVKM_ENGINE_MSPPP : engn = 2; break; in gf100_fifo_engidx()
115 case NVKM_ENGINE_MSPDEC: engn = 3; break; in gf100_fifo_engidx()
116 case NVKM_ENGINE_CE0 : engn = 4; break; in gf100_fifo_engidx()
117 case NVKM_ENGINE_CE1 : engn = 5; break; in gf100_fifo_engidx()
122 return engn; in gf100_fifo_engidx()
126 gf100_fifo_engine(struct gf100_fifo *fifo, u32 engn) in gf100_fifo_engine() argument
151 u32 engn, engm = 0; gf100_fifo_recover_work() local
323 u32 engn; gf100_fifo_intr_sched_ctxsw() local
462 gf100_fifo_intr_engine_unit(struct gf100_fifo *fifo, int engn) gf100_fifo_intr_engine_unit() argument
[all...]
H A Dchang84.c97 u32 engn, save; in g84_fifo_chan_engine_fini() local
105 engn = g84_fifo_chan_engine(engine); in g84_fifo_chan_engine_fini()
106 save = nvkm_mask(device, 0x002520, 0x0000003f, 1 << engn); in g84_fifo_chan_engine_fini()
137 struct nvkm_gpuobj *engn = chan->engn[engine->subdev.index]; in g84_fifo_chan_engine_init() local
144 limit = engn->addr + engn->size - 1; in g84_fifo_chan_engine_init()
145 start = engn->addr; in g84_fifo_chan_engine_init()
165 int engn = engine->subdev.index; in g84_fifo_chan_engine_ctor() local
170 return nvkm_object_bind(object, NULL, 0, &chan->engn[eng in g84_fifo_chan_engine_ctor()
[all...]
H A Dgpfifogf100.c114 u64 addr = chan->engn[engine->subdev.index].vma->addr; in gf100_fifo_gpfifo_engine_init()
129 nvkm_vmm_put(chan->base.vmm, &chan->engn[engine->subdev.index].vma); in gf100_fifo_gpfifo_engine_dtor()
130 nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst); in gf100_fifo_gpfifo_engine_dtor()
139 int engn = engine->subdev.index; in gf100_fifo_gpfifo_engine_ctor() local
145 ret = nvkm_object_bind(object, NULL, 0, &chan->engn[engn].inst); in gf100_fifo_gpfifo_engine_ctor()
149 ret = nvkm_vmm_get(chan->base.vmm, 12, chan->engn[engn].inst->size, in gf100_fifo_gpfifo_engine_ctor()
150 &chan->engn[engn] in gf100_fifo_gpfifo_engine_ctor()
[all...]
H A Dgpfifogk104.c133 u64 addr = chan->engn[engine->subdev.index].vma->addr; in gk104_fifo_gpfifo_engine_init()
154 nvkm_vmm_put(chan->base.vmm, &chan->engn[engine->subdev.index].vma); in gk104_fifo_gpfifo_engine_dtor()
155 nvkm_gpuobj_del(&chan->engn[engine->subdev.index].inst); in gk104_fifo_gpfifo_engine_dtor()
164 int engn = engine->subdev.index; in gk104_fifo_gpfifo_engine_ctor() local
170 ret = nvkm_object_bind(object, NULL, 0, &chan->engn[engn].inst); in gk104_fifo_gpfifo_engine_ctor()
174 ret = nvkm_vmm_get(chan->base.vmm, 12, chan->engn[engn].inst->size, in gk104_fifo_gpfifo_engine_ctor()
175 &chan->engn[engn] in gk104_fifo_gpfifo_engine_ctor()
[all...]
H A Dchannv50.c106 struct nvkm_gpuobj *engn = chan->engn[engine->subdev.index]; in nv50_fifo_chan_engine_init() local
113 limit = engn->addr + engn->size - 1; in nv50_fifo_chan_engine_init()
114 start = engn->addr; in nv50_fifo_chan_engine_init()
133 nvkm_gpuobj_del(&chan->engn[engine->subdev.index]); in nv50_fifo_chan_engine_dtor()
142 int engn = engine->subdev.index; in nv50_fifo_chan_engine_ctor() local
147 return nvkm_object_bind(object, NULL, 0, &chan->engn[engn]); in nv50_fifo_chan_engine_ctor()
H A Ddmanv40.c102 inst = chan->engn[engine->subdev.index]->addr >> 4; in nv40_fifo_dma_engine_init()
124 nvkm_gpuobj_del(&chan->engn[engine->subdev.index]); in nv40_fifo_dma_engine_dtor()
133 const int engn = engine->subdev.index; in nv40_fifo_dma_engine_ctor() local
139 return nvkm_object_bind(object, NULL, 0, &chan->engn[engn]); in nv40_fifo_dma_engine_ctor()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dbase.c54 const struct nvkm_sw_chan_sclass *sclass = oclass->engn; in nvkm_sw_oclass_new()
66 oclass->engn = &sw->func->sclass[index]; in nvkm_sw_oclass_get()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dbase.c54 const struct nvkm_sw_chan_sclass *sclass = oclass->engn; in nvkm_sw_oclass_new()
66 oclass->engn = &sw->func->sclass[index]; in nvkm_sw_oclass_get()

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