Searched refs:enabled_mask (Results 1 - 12 of 12) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_mdss.c | 25 unsigned long enabled_mask; member 77 clear_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask); in dpu_mdss_irq_mask() 88 set_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask); in dpu_mdss_irq_unmask() 130 dpu_mdss->irq_controller.enabled_mask = 0; in _dpu_mdss_irq_domain_add()
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/ |
H A D | mdp5_mdss.c | 26 volatile unsigned long enabled_mask; member 77 clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask); in mdss_hw_mask_irq() 86 set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask); in mdss_hw_unmask_irq() 128 mdp5_mdss->irqcontroller.enabled_mask = 0; in mdss_irq_domain_init()
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/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/ |
H A D | pcmuio.c | 120 unsigned int enabled_mask; member 291 chip->enabled_mask = 0; in pcmuio_stop_intr() 316 if (!(triggered & chip->enabled_mask)) in pcmuio_handle_intr_subdev() 386 chip->enabled_mask = 0; in pcmuio_start_intr() 400 chip->enabled_mask = bits; in pcmuio_start_intr()
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H A D | pcmmio.c | 181 unsigned int enabled_mask; member 314 devpriv->enabled_mask = 0; in pcmmio_stop_intr() 337 if (!(triggered & devpriv->enabled_mask)) in pcmmio_handle_dio_intr() 390 devpriv->enabled_mask = 0; in pcmmio_start_intr() 404 devpriv->enabled_mask = bits; in pcmmio_start_intr()
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/kernel/linux/linux-6.6/drivers/comedi/drivers/ |
H A D | pcmuio.c | 119 unsigned int enabled_mask; member 290 chip->enabled_mask = 0; in pcmuio_stop_intr() 315 if (!(triggered & chip->enabled_mask)) in pcmuio_handle_intr_subdev() 385 chip->enabled_mask = 0; in pcmuio_start_intr() 399 chip->enabled_mask = bits; in pcmuio_start_intr()
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H A D | pcmmio.c | 180 unsigned int enabled_mask; member 313 devpriv->enabled_mask = 0; in pcmmio_stop_intr() 336 if (!(triggered & devpriv->enabled_mask)) in pcmmio_handle_dio_intr() 389 devpriv->enabled_mask = 0; in pcmmio_start_intr() 403 devpriv->enabled_mask = bits; in pcmmio_start_intr()
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/kernel/linux/linux-6.6/drivers/gpu/drm/msm/ |
H A D | msm_mdss.c | 39 unsigned long enabled_mask; member 120 clear_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask); in msm_mdss_irq_mask() 131 set_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask); in msm_mdss_irq_unmask() 174 msm_mdss->irq_controller.enabled_mask = 0; in _msm_mdss_irq_domain_add()
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/kernel/linux/linux-5.10/drivers/scsi/aic94xx/ |
H A D | aic94xx_scb.c | 112 u8 enabled_mask = asd_ha->hw_prof.enabled_phys; in ord_phy() local 115 for_each_phy(enabled_mask, enabled_mask, i) { in ord_phy()
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/kernel/linux/linux-6.6/drivers/scsi/aic94xx/ |
H A D | aic94xx_scb.c | 114 u8 enabled_mask = asd_ha->hw_prof.enabled_phys; in ord_phy() local 117 for_each_phy(enabled_mask, enabled_mask, i) { in ord_phy()
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/kernel/linux/linux-6.6/drivers/accel/habanalabs/gaudi2/ |
H A D | gaudi2P.h | 442 * @enabled_mask: mask of enabled instances (1- enabled, 0- disabled). 452 u64 enabled_mask; member
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H A D | gaudi2_coresight.c | 2583 u32 enabled_mask, in gaudi2_coresight_set_disabled_components() 2597 disabled_mask = (~enabled_mask) & full_mask; in gaudi2_coresight_set_disabled_components() 2582 gaudi2_coresight_set_disabled_components(struct hl_device *hdev, u32 unit_count, u32 enabled_mask, const struct component_config_offsets *binning_table) gaudi2_coresight_set_disabled_components() argument
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H A D | gaudi2.c | 10273 if (!(cfg_ctx->enabled_mask & BIT_ULL(seq))) in gaudi2_init_block_instances() 10286 cfg_ctx->enabled_mask = mask; in gaudi2_init_blocks_with_mask()
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