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Searched refs:dep_mclk_table (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A D	smu7_hwmgr.c	813 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table; in smu7_setup_dpm_tables_v1() local 819 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_setup_dpm_tables_v1() 828 PP_ASSERT_WITH_CODE(dep_mclk_table != NULL, in smu7_setup_dpm_tables_v1() 831 PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1, in smu7_setup_dpm_tables_v1() 853 for (i = 0; i < dep_mclk_table->count; i++) { in smu7_setup_dpm_tables_v1() 856 dep_mclk_table->entries[i].clk) { in smu7_setup_dpm_tables_v1() 858 dep_mclk_table->entries[i].clk; in smu7_setup_dpm_tables_v1() 866 hwmgr->platform_descriptor.overdriveLimit.memoryClock = dep_mclk_table->entries[i-1].clk; in smu7_setup_dpm_tables_v1() 879 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table; in smu7_odn_initial_default_setting() local 886 dep_mclk_table in smu7_odn_initial_default_setting() 2204 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table; smu7_patch_voltage_workaround() local 3322 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table = smu7_get_pp_table_entry_v1() local 3465 struct phm_clock_voltage_dependency_table dep_mclk_table = smu7_get_pp_table_entry_v0() local 4803 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table; smu7_get_mclks() local 4869 struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table = smu7_get_mclks_with_latency() local [all...]
H A D	vega10_hwmgr.c	`1310 struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table = in vega10_setup_default_dpm_tables() local 1337 PP_ASSERT_WITH_CODE(dep_mclk_table, in vega10_setup_default_dpm_tables() 1340 PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1, in vega10_setup_default_dpm_tables() 1366 dep_mclk_table); in vega10_setup_default_dpm_tables()`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A D	smu7_hwmgr.c	875 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table; in smu7_setup_dpm_tables_v1() local 881 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_setup_dpm_tables_v1() 890 PP_ASSERT_WITH_CODE(dep_mclk_table != NULL, in smu7_setup_dpm_tables_v1() 893 PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1, in smu7_setup_dpm_tables_v1() 915 for (i = 0; i < dep_mclk_table->count; i++) { in smu7_setup_dpm_tables_v1() 918 dep_mclk_table->entries[i].clk) { in smu7_setup_dpm_tables_v1() 920 dep_mclk_table->entries[i].clk; in smu7_setup_dpm_tables_v1() 928 hwmgr->platform_descriptor.overdriveLimit.memoryClock = dep_mclk_table->entries[i-1].clk; in smu7_setup_dpm_tables_v1() 941 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table; in smu7_odn_initial_default_setting() local 948 dep_mclk_table in smu7_odn_initial_default_setting() 2495 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table; smu7_patch_voltage_workaround() local 3696 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table = smu7_get_pp_table_entry_v1() local 3839 struct phm_clock_voltage_dependency_table dep_mclk_table = smu7_get_pp_table_entry_v0() local 5207 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table; smu7_get_mclks() local 5273 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table = smu7_get_mclks_with_latency() local 5324 struct phm_ppt_v1_clock_voltage_dependency_table dep_mclk_table = smu7_set_watermarks_for_clocks_ranges() local [all...]
H A D	vega10_hwmgr.c	`1308 struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table = in vega10_setup_default_dpm_tables() local 1335 PP_ASSERT_WITH_CODE(dep_mclk_table, in vega10_setup_default_dpm_tables() 1338 PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1, in vega10_setup_default_dpm_tables() 1364 dep_mclk_table); in vega10_setup_default_dpm_tables()`

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