Home
Sort by
last modified time
|
relevance
|
path
Repository(s)
applications
arkcompiler
base
build
commonlibrary
developtools
device
docs
domains
drivers
foundation
ide
interface
kernel
napi_generator
productdefine
test
third_party
vendor
select all
invert selection
clear
Full Search
Search through all text tokens(words,strings,identifiers,numbers) in index.
Definition
Only finds symbol definitions(where e.g a variable(function,...) is defined).
Symbol
Only finds symbol(e.g. methods classes,function,variables).
File Path
Path of the source file(use "/").If you want just exact path,enclose it in "".Source files end with: .jar/.bz2/.a/.h/.java...
History
History log comments.
Type
Any
Bzip(2)
C
Clojure
C#
C++
ELF
Erlang
Image file
Fortran
Golang
GZIP
Haskell
Jar
Java
Java class
JavaScript
Lisp
Lua
Pascal
Perl
PHP
Plain Text
PL/SQL
Python
Rust
Scala
Shell script
SQL
Tar
Tcl
Troff
UUEncoded
Visual Basic
XML
Zip
Type of analyzer used to filter file types include with selected(e.g. just C sources).
Help
Searched
refs:dcn2_1_soc
(Results
1 - 4
of
4
) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/
H
A
D
dcn21_resource.c
164
struct _vcs_dpi_soc_bounding_box_st
dcn2_1_soc
= {
variable
1415
dcn2_1_soc
.num_chans = bw_params->num_channels;
in update_bw_bounding_box()
1420
for (closest_clk_lvl = 0, j =
dcn2_1_soc
.num_states - 1; j >= 0; j--) {
in update_bw_bounding_box()
1421
if ((unsigned int)
dcn2_1_soc
.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) {
in update_bw_bounding_box()
1433
clock_limits[i].dispclk_mhz =
dcn2_1_soc
.clock_limits[closest_clk_lvl].dispclk_mhz;
in update_bw_bounding_box()
1434
clock_limits[i].dppclk_mhz =
dcn2_1_soc
.clock_limits[closest_clk_lvl].dppclk_mhz;
in update_bw_bounding_box()
1435
clock_limits[i].dram_bw_per_chan_gbps =
dcn2_1_soc
.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps;
in update_bw_bounding_box()
1436
clock_limits[i].dscclk_mhz =
dcn2_1_soc
.clock_limits[closest_clk_lvl].dscclk_mhz;
in update_bw_bounding_box()
1437
clock_limits[i].dtbclk_mhz =
dcn2_1_soc
.clock_limits[closest_clk_lvl].dtbclk_mhz;
in update_bw_bounding_box()
1438
clock_limits[i].phyclk_d18_mhz =
dcn2_1_soc
in update_bw_bounding_box()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H
A
D
dcn20_fpu.c
622
struct _vcs_dpi_soc_bounding_box_st
dcn2_1_soc
= {
variable
2383
low_pstate_lvl.dispclk_mhz =
dcn2_1_soc
.clock_limits[high_voltage_lvl].dispclk_mhz;
in construct_low_pstate_lvl()
2384
low_pstate_lvl.dppclk_mhz =
dcn2_1_soc
.clock_limits[high_voltage_lvl].dppclk_mhz;
in construct_low_pstate_lvl()
2385
low_pstate_lvl.dram_bw_per_chan_gbps =
dcn2_1_soc
.clock_limits[high_voltage_lvl].dram_bw_per_chan_gbps;
in construct_low_pstate_lvl()
2386
low_pstate_lvl.dscclk_mhz =
dcn2_1_soc
.clock_limits[high_voltage_lvl].dscclk_mhz;
in construct_low_pstate_lvl()
2387
low_pstate_lvl.dtbclk_mhz =
dcn2_1_soc
.clock_limits[high_voltage_lvl].dtbclk_mhz;
in construct_low_pstate_lvl()
2388
low_pstate_lvl.phyclk_d18_mhz =
dcn2_1_soc
.clock_limits[high_voltage_lvl].phyclk_d18_mhz;
in construct_low_pstate_lvl()
2389
low_pstate_lvl.phyclk_mhz =
dcn2_1_soc
.clock_limits[high_voltage_lvl].phyclk_mhz;
in construct_low_pstate_lvl()
2411
dcn2_1_soc
.num_chans = bw_params->num_channels;
in dcn21_update_bw_bounding_box()
2414
/* Copy
dcn2_1_soc
in dcn21_update_bw_bounding_box()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/
H
A
D
dcn21_resource.h
39
extern struct _vcs_dpi_soc_bounding_box_st
dcn2_1_soc
;
H
A
D
dcn21_resource.c
1583
dml_init_instance(&dc->dml, &
dcn2_1_soc
, &dcn2_1_ip, DML_PROJECT_DCN21);
in dcn21_resource_construct()
Completed in 8 milliseconds