Searched refs:ctxvals_pos (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| H A D | ctxnv40.h | 20 u32 ctxvals_pos; member
47 ctx->ctxvals_base = ctx->ctxvals_pos; in cp_ctx()
48 ctx->ctxvals_pos = ctx->ctxvals_base + length; in cp_ctx()
113 ctx->ctxvals_pos = offset; in cp_pos()
114 ctx->ctxvals_base = ctx->ctxvals_pos; in cp_pos()
116 cp_lsr(ctx, ctx->ctxvals_pos); in cp_pos()
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| H A D | ctxnv50.c | 250 ctx->ctxvals_pos += 0x400; /* padding... no idea why you need it */ in nv50_grctx_generate()
283 *size = ctx.ctxvals_pos * 4; in nv50_grctx_init()
789 nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + i), val); in dd_emit()
791 ctx->ctxvals_pos += num; in dd_emit()
799 base = ctx->ctxvals_pos; in nv50_gr_construct_mmio_ddata()
1107 num = ctx->ctxvals_pos - base; in nv50_gr_construct_mmio_ddata()
1108 ctx->ctxvals_pos = base; in nv50_gr_construct_mmio_ddata()
1162 nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + (i << 3)), val); in xf_emit()
1164 ctx->ctxvals_pos += num << 3; in xf_emit()
1197 offset = (ctx->ctxvals_pos in nv50_gr_construct_xfer1()
[all...] |
| H A D | ctxnv40.c | 545 ctx->ctxvals_pos += len; in nv40_gr_construct_state3d_3()
577 offset = ctx->ctxvals_pos; in nv40_gr_construct_shader()
578 ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len)); in nv40_gr_construct_shader()
645 cp_pos (ctx, ctx->ctxvals_pos); in nv40_grctx_generate()
689 *size = ctx.ctxvals_pos * 4; in nv40_grctx_init()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| H A D | ctxnv40.h | 20 u32 ctxvals_pos; member
47 ctx->ctxvals_base = ctx->ctxvals_pos; in cp_ctx()
48 ctx->ctxvals_pos = ctx->ctxvals_base + length; in cp_ctx()
113 ctx->ctxvals_pos = offset; in cp_pos()
114 ctx->ctxvals_base = ctx->ctxvals_pos; in cp_pos()
116 cp_lsr(ctx, ctx->ctxvals_pos); in cp_pos()
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| H A D | ctxnv50.c | 250 ctx->ctxvals_pos += 0x400; /* padding... no idea why you need it */ in nv50_grctx_generate()
283 *size = ctx.ctxvals_pos * 4; in nv50_grctx_init()
789 nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + i), val); in dd_emit()
791 ctx->ctxvals_pos += num; in dd_emit()
799 base = ctx->ctxvals_pos; in nv50_gr_construct_mmio_ddata()
1107 num = ctx->ctxvals_pos - base; in nv50_gr_construct_mmio_ddata()
1108 ctx->ctxvals_pos = base; in nv50_gr_construct_mmio_ddata()
1162 nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + (i << 3)), val); in xf_emit()
1164 ctx->ctxvals_pos += num << 3; in xf_emit()
1197 offset = (ctx->ctxvals_pos in nv50_gr_construct_xfer1()
[all...] |
| H A D | ctxnv40.c | 545 ctx->ctxvals_pos += len; in nv40_gr_construct_state3d_3()
577 offset = ctx->ctxvals_pos; in nv40_gr_construct_shader()
578 ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len)); in nv40_gr_construct_shader()
645 cp_pos (ctx, ctx->ctxvals_pos); in nv40_grctx_generate()
689 *size = ctx.ctxvals_pos * 4; in nv40_grctx_init()
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