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Help
Searched
refs:cmn_clk_cfg0
(Results
1 - 5
of
5
) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/
H
A
D
dsi_pll_10nm.c
538
u32
cmn_clk_cfg0
, cmn_clk_cfg1;
in dsi_pll_10nm_save_state()
local
544
cmn_clk_cfg0
= pll_read(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG0);
in dsi_pll_10nm_save_state()
545
cached->bit_clk_div =
cmn_clk_cfg0
& 0xf;
in dsi_pll_10nm_save_state()
546
cached->pix_clk_div = (
cmn_clk_cfg0
& 0xf0) >> 4;
in dsi_pll_10nm_save_state()
H
A
D
dsi_pll_7nm.c
564
u32
cmn_clk_cfg0
, cmn_clk_cfg1;
in dsi_pll_7nm_save_state()
local
570
cmn_clk_cfg0
= pll_read(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG0);
in dsi_pll_7nm_save_state()
571
cached->bit_clk_div =
cmn_clk_cfg0
& 0xf;
in dsi_pll_7nm_save_state()
572
cached->pix_clk_div = (
cmn_clk_cfg0
& 0xf0) >> 4;
in dsi_pll_7nm_save_state()
H
A
D
dsi_pll_14nm.c
103
u32
cmn_clk_cfg0
;
member
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/phy/
H
A
D
dsi_phy_10nm.c
489
u32
cmn_clk_cfg0
, cmn_clk_cfg1;
in dsi_10nm_pll_save_state()
local
495
cmn_clk_cfg0
= dsi_phy_read(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG0);
in dsi_10nm_pll_save_state()
496
cached->bit_clk_div =
cmn_clk_cfg0
& 0xf;
in dsi_10nm_pll_save_state()
497
cached->pix_clk_div = (
cmn_clk_cfg0
& 0xf0) >> 4;
in dsi_10nm_pll_save_state()
H
A
D
dsi_phy_7nm.c
538
u32
cmn_clk_cfg0
, cmn_clk_cfg1;
in dsi_7nm_pll_save_state()
local
544
cmn_clk_cfg0
= dsi_phy_read(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG0);
in dsi_7nm_pll_save_state()
545
cached->bit_clk_div =
cmn_clk_cfg0
& 0xf;
in dsi_7nm_pll_save_state()
546
cached->pix_clk_div = (
cmn_clk_cfg0
& 0xf0) >> 4;
in dsi_7nm_pll_save_state()
Completed in 7 milliseconds